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2022-08-11 - 15:59

x86 Intel Core i7-3770K @3500 MHz, Linux 5.4.102-rt53 (Profile)

Latency plot of system in rack #c, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h200 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100, highest latencies:
System rackcslot6.osadl.org (updated Thu Aug 11, 2022 00:46:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34790022870,4sleep010-21ksoftirqd/019:05:160
349199210182,17sleep70-21swapper/719:07:097
348400210181,4sleep50-21swapper/519:05:225
348128210082,16sleep30-21swapper/319:05:203
34929729456,12sleep10-21swapper/119:08:311
6243672930,1sleep656-21ksoftirqd/600:15:216
34934929269,11sleep60-21swapper/619:09:176
34803529272,18sleep20-21swapper/219:05:192
4384602850,1sleep763-21ksoftirqd/721:28:547
349638998216,36cyclictest0-21swapper/700:31:337
349638998215,38cyclictest0-21swapper/720:36:337
349638998215,38cyclictest0-21swapper/720:01:337
349638998116,36cyclictest0-21swapper/719:46:337
349638998032,36cyclictest0-21swapper/719:36:337
6254652790,0sleep20-21swapper/200:16:062
349638997914,36cyclictest0-21swapper/720:46:337
349623997914,36cyclictest0-21swapper/522:56:335
4810712780,0sleep70-21swapper/722:05:557
34926327861,12sleep40-21swapper/419:08:024
349623997714,39cyclictest0-21swapper/520:26:335
349623997714,39cyclictest0-21swapper/520:26:325
4761322730,0sleep763-21ksoftirqd/722:01:547
4159392730,0sleep40-21swapper/421:05:204
5672052720,0sleep70-21swapper/723:25:007
4940902720,0sleep10-21swapper/122:18:541
4767482720,0sleep10-21swapper/122:02:521
6144942710,1sleep656-21ksoftirqd/600:06:176
34963899709,31cyclictest0-21swapper/723:56:337
5276652680,0sleep60-21swapper/622:49:196
349602996716,35cyclictest0-21swapper/221:56:332
349602996716,35cyclictest0-21swapper/221:56:322
5432082340,2sleep763-21ksoftirqd/723:02:337
349602993116,14cyclictest0-21swapper/219:16:332
349623993014,15cyclictest0-21swapper/521:16:335
349602993014,15cyclictest0-21swapper/220:31:332
349591993013,16cyclictest0-21swapper/121:11:331
349591992913,15cyclictest0-21swapper/123:16:331
349623992812,15cyclictest0-21swapper/523:51:325
349591992711,15cyclictest0-21swapper/122:41:331
349623992610,15cyclictest0-21swapper/519:31:325
349623992610,15cyclictest0-21swapper/500:26:335
349602992610,15cyclictest0-21swapper/219:41:332
4231242250,0sleep40-21swapper/421:15:134
349617992510,13cyclictest0-21swapper/419:21:324
34960299259,15cyclictest0-21swapper/223:36:332
34961799248,15cyclictest0-21swapper/420:16:334
34960299249,15cyclictest0-21swapper/222:51:332
349591992416,8cyclictest0-21swapper/121:01:321
5008762230,0sleep40-21swapper/422:25:134
34960299237,15cyclictest0-21swapper/223:06:322
5040862220,0sleep60-21swapper/622:27:086
4883302220,0sleep30-21swapper/322:13:353
4462832220,1sleep228-21ksoftirqd/221:35:222
34963899226,15cyclictest0-21swapper/722:26:327
34960299226,15cyclictest0-21swapper/221:06:322
34960299226,15cyclictest0-21swapper/219:56:322
5483902210,0sleep00-21swapper/023:06:590
34963899215,15cyclictest0-21swapper/723:41:327
5638182200,0sleep50-21swapper/523:20:265
34960299204,15cyclictest0-21swapper/220:06:332
34959199204,15cyclictest0-21swapper/121:36:321
5103332190,0sleep30-21swapper/322:33:143
3625472190,1sleep3341rcuc/319:30:203
34962399196,12cyclictest0-21swapper/522:16:335
34962399194,14cyclictest0-21swapper/521:51:335
34959199193,9cyclictest0-21swapper/120:41:321
34959199193,10cyclictest0-21swapper/100:16:331
5992322180,0sleep00-21swapper/023:53:280
5335062180,1sleep549-21ksoftirqd/522:54:475
34963899185,12cyclictest0-21swapper/723:26:327
34963899185,12cyclictest0-21swapper/723:26:327
349609991814,4cyclictest0-21swapper/320:51:323
349609991810,8cyclictest0-21swapper/319:11:333
215199180,1rtkit-daemon2150-21rtkit-daemon22:14:415
5021472170,0sleep20-21swapper/222:25:202
4224392170,0sleep30-21swapper/321:14:553
34963899175,12cyclictest0-21swapper/721:41:337
34960999176,11cyclictest0-21swapper/300:06:333
349609991714,3cyclictest0-21swapper/321:26:333
34960299171,15cyclictest0-21swapper/200:11:322
215199170,0rtkit-daemon0-21swapper/519:55:561
349631991615,1cyclictest0-21swapper/623:31:336
349631991615,1cyclictest0-21swapper/623:21:336
349631991615,1cyclictest0-21swapper/622:36:336
349631991615,1cyclictest0-21swapper/622:21:336
349631991615,1cyclictest0-21swapper/621:46:336
349631991615,1cyclictest0-21swapper/620:11:336
349631991615,1cyclictest0-21swapper/619:26:336
349631991615,1cyclictest0-21swapper/600:21:336
34962399160,1cyclictest0-21swapper/519:51:335
349609991615,1cyclictest592453-21ssh23:46:333
215199160,1rtkit-daemon818-21earlyoom21:29:451
349631991514,1cyclictest0-21swapper/621:21:336
215199150,1rtkit-daemon818-21earlyoom23:47:581
215199150,1rtkit-daemon2150-21rtkit-daemon21:48:555
215199150,1rtkit-daemon2150-21rtkit-daemon19:38:075
349631991413,1cyclictest0-21swapper/623:11:336
34962399140,1cyclictest0-21swapper/500:24:235
34961799140,13cyclictest0-21swapper/400:25:034
349602991413,1cyclictest0-21swapper/222:30:422
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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