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2022-05-28 - 16:05

x86 Intel Core i7-3770K @3500 MHz, Linux 5.4.102-rt53 (Profile)

Latency plot of system in rack #c, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h200 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot6.osadl.org (updated Sat May 28, 2022 00:46:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
41041842121117,2sleep00-21swapper/019:06:520
4103955211592,4sleep50-21swapper/519:05:285
410427929157,11sleep60-21swapper/619:08:106
603012890,0sleep5481rcuc/522:22:495
41897572890,0sleep1201rcuc/121:25:181
1762052880,0sleep0111rcuc/000:06:160
4104601998718,38cyclictest0-21swapper/123:41:221
4104601998616,37cyclictest0-21swapper/123:26:221
4104591998517,38cyclictest0-21swapper/020:16:220
410438528260,11sleep20-21swapper/219:09:432
410434328164,11sleep70-21swapper/719:09:087
410438428057,12sleep10-21swapper/119:09:421
410430328057,12sleep30-21swapper/319:08:323
41566402790,2sleep010-21ksoftirqd/020:40:150
1944282790,2sleep228-21ksoftirqd/200:23:402
68232780,0sleep70-21swapper/721:35:177
410409127856,11sleep40-21swapper/419:05:354
1735292760,1sleep5481rcuc/500:05:105
601452740,0sleep656-21ksoftirqd/622:22:346
410464699749,34cyclictest0-21swapper/721:16:227
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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