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2022-01-26 - 12:15

Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz, Linux 5.4.102-rt53 (Profile)

Latency plot of system in rack #c, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h200 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackcslot6.osadl.org (updated Wed Jan 26, 2022 00:46:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
150486723030,9sleep010-21ksoftirqd/019:05:200
15050652123105,2sleep10-21swapper/119:05:221
157635621050,0sleep70-21swapper/721:10:247
157635621050,0sleep70-21swapper/721:10:247
212099900,67rtkit-daemon0-21swapper/519:07:575
150637828970,3sleep30-21swapper/319:06:213
1506856998410,46cyclictest49-21ksoftirqd/500:39:495
1506841998315,36cyclictest0-21swapper/322:44:493
1506841998315,36cyclictest0-21swapper/322:44:493
1506841998315,36cyclictest0-21swapper/322:09:493
1506856998211,43cyclictest49-21ksoftirqd/519:54:505
1506856998211,43cyclictest49-21ksoftirqd/519:54:495
150646828243,33sleep70-21swapper/719:07:377
150659928142,13sleep60-21swapper/619:09:306
16877992800,1sleep763-21ksoftirqd/722:49:007
16456952790,1sleep4411rcuc/422:10:454
1506863997715,34cyclictest0-21swapper/622:19:496
1506863997712,40cyclictest56-21ksoftirqd/620:59:496
15764582750,0sleep00-21swapper/021:10:250
15764582750,0sleep00-21swapper/021:10:250
1506841997516,39cyclictest0-21swapper/321:24:493
17990332730,2sleep6551rcuc/600:32:086
17356052720,0sleep228-21ksoftirqd/223:31:332
15981792720,0sleep50-21swapper/521:30:165
150638127247,12sleep40-21swapper/419:06:214
15968442700,0sleep40-21swapper/421:29:354
150536727044,12sleep20-21swapper/219:05:312
18012222690,0sleep20-21swapper/200:35:012
150681799661,36cyclictest0-21swapper/020:14:490
1506823996314,12cyclictest0-21swapper/123:54:491
1506823995814,12cyclictest0-21swapper/120:49:491
1506834993517,9cyclictest0-21swapper/219:19:492
1506834993114,7cyclictest0-21swapper/219:34:492
1506823993014,15cyclictest0-21swapper/120:39:491
1506834992913,15cyclictest0-21swapper/223:44:492
1506823992913,15cyclictest0-21swapper/100:04:491
1506856992812,15cyclictest0-21swapper/523:24:495
1506823992812,15cyclictest0-21swapper/123:09:491
1506823992812,15cyclictest0-21swapper/122:49:491
1506863992711,15cyclictest0-21swapper/623:39:496
16950452260,0sleep60-21swapper/622:55:166
15871972260,0sleep10-21swapper/121:20:201
150682399268,15cyclictest0-21swapper/100:34:491
150683499259,15cyclictest0-21swapper/220:54:492
1506823992515,10cyclictest0-21swapper/123:29:491
150683499246,14cyclictest0-21swapper/222:29:492
150682399248,15cyclictest0-21swapper/122:59:491
16817722220,0sleep763-21ksoftirqd/722:43:327
16817722220,0sleep763-21ksoftirqd/722:43:327
15778712220,0sleep30-21swapper/321:11:493
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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