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2024-04-25 - 19:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Apr 25, 2024 12:48:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2279912840,270ptp4l0-21swapper/107:05:141
155549923232,194cyclictest151rcu_preempt10:30:456
154799917614,130cyclictest0-21swapper/008:19:190
154799917614,130cyclictest0-21swapper/008:19:190
154799917614,121cyclictest0-21swapper/009:53:580
154799917214,93cyclictest0-21swapper/009:25:250
154799917214,113cyclictest0-21swapper/010:41:300
154799917114,114cyclictest0-21swapper/007:30:110
156539917052,80cyclictest0-21swapper/3011:52:4724
154799916114,100cyclictest0-21swapper/012:05:090
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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