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2024-06-20 - 07:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Jun 20, 2024 00:48:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
209999480115,199cyclictest151rcu_preempt23:18:0427
289252213205,6sleep20-21swapper/219:05:1512
2257991810,73cyclictest0-21swapper/2621:10:2419
2257991770,74cyclictest0-21swapper/2621:20:0019
22419917410,111cyclictest0-21swapper/2400:30:3917
22419916310,127cyclictest0-21swapper/2420:20:0117
22419916310,127cyclictest0-21swapper/2420:20:0017
22419916010,125cyclictest0-21swapper/2419:15:2517
311932159151,6sleep110-21swapper/1119:05:243
22419915210,85cyclictest0-21swapper/2423:13:0617
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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