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2024-10-12 - 17:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackcslot8.osadl.org (updated Sat Oct 12, 2024 12:48:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
60649925459,1cyclictest151rcu_preempt12:17:4627
60649925459,1cyclictest151rcu_preempt12:17:4627
6125992246,175cyclictest0-21swapper/1810:51:2410
6125992106,175cyclictest0-21swapper/1810:31:0610
622099198122,2cyclictest151rcu_preempt12:07:2424
622099198122,2cyclictest151rcu_preempt12:07:2424
46682197189,6sleep220-21swapper/2207:07:2015
46682197189,6sleep220-21swapper/2207:07:2015
6125991786,165cyclictest0-21swapper/1810:20:2510
6125991746,163cyclictest0-21swapper/1810:55:3910
6125991746,136cyclictest0-21swapper/1807:15:0010
2482911720,164ptp4l0-21swapper/107:08:421
2482911720,164ptp4l0-21swapper/107:08:421
60699916454,109cyclictest0-21swapper/609:53:4028
6125991626,114cyclictest0-21swapper/1809:34:2710
6125991566,97cyclictest0-21swapper/1807:15:3010
6125991476,111cyclictest0-21swapper/1811:40:0110
611199144143,1cyclictest112-21ksoftirqd/1609:17:108
62289914325,84cyclictest0-21swapper/3109:42:0725
61119914311,108cyclictest151rcu_preempt11:18:018
60699914129,111cyclictest0-21swapper/607:55:2428
60559914076,42cyclictest0-21swapper/312:38:0323
60559914076,42cyclictest0-21swapper/312:38:0323
61729913747,56cyclictest0-21swapper/2409:40:4917
61729913626,45cyclictest0-21swapper/2409:10:1817
60559913649,49cyclictest0-21swapper/309:46:3023
62289913448,40cyclictest0-21swapper/3108:25:1325
61729913450,52cyclictest0-21swapper/2411:31:2317
61729913426,68cyclictest0-21swapper/2407:30:2417
6125991346,84cyclictest0-21swapper/1808:00:5510
329891134126,6phc2sys0-21swapper/207:05:2412
329891134126,6phc2sys0-21swapper/207:05:2312
60559913324,65cyclictest0-21swapper/310:51:1023
60559913324,65cyclictest0-21swapper/310:45:4923
62289913228,67cyclictest0-21swapper/3109:21:1925
61729913224,77cyclictest0-21swapper/2410:27:4817
61479913210,113cyclictest0-21swapper/2110:23:4014
62289913130,66cyclictest0-21swapper/3107:59:4925
61729913130,62cyclictest0-21swapper/2407:40:0217
61729913128,69cyclictest0-21swapper/2408:15:1917
61729913121,102cyclictest944-21missed_timers10:35:1817
60559913128,70cyclictest0-21swapper/311:59:3423
60559913128,70cyclictest0-21swapper/311:59:3323
60559913124,62cyclictest0-21swapper/310:21:1423
62289913030,65cyclictest0-21swapper/3110:41:2925
62289913029,66cyclictest0-21swapper/3107:10:2525
62289913028,66cyclictest0-21swapper/3111:02:5125
62289913028,66cyclictest0-21swapper/3110:50:0125
62289913027,72cyclictest0-21swapper/3111:09:1625
62289913027,71cyclictest0-21swapper/3110:59:0725
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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