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2026-05-21 - 00:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Wed May 20, 2026 12:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1722899240,6cyclictest31886-21nvmesmart_nvme008:30:212
1722799225,9cyclictest0-21swapper/112:00:231
1722899210,20cyclictest870-21systemd-logind08:14:412
17228992020,0cyclictest0-21swapper/209:56:192
17228992013,4cyclictest8178-21fschecks_count07:50:162
1722799207,11cyclictest0-21swapper/109:45:201
1722799203,16cyclictest0-21swapper/111:26:461
1722899193,15cyclictest27264-21acpi11:15:102
17228991917,1cyclictest28-21ksoftirqd/211:45:142
17228991915,3cyclictest271rcuc/209:08:392
1722899190,3cyclictest26778-21cpuspeed_turbos09:20:112
1722899190,18cyclictest271rcuc/210:52:362
1722799193,1cyclictest21-21ksoftirqd/112:16:361
1722799193,15cyclictest21-21ksoftirqd/109:39:421
17227991917,1cyclictest21-21ksoftirqd/110:24:571
17227991917,1cyclictest0-21swapper/110:44:261
17227991916,2cyclictest14882-21open_files10:50:191
1722799190,2cyclictest3987-21H222:10:211
1722799190,18cyclictest870-21systemd-logind07:46:521
1722699194,1cyclictest0-21swapper/011:11:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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