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2021-01-16 - 06:25

Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz, Linux 5.4.17-rt9 (Profile)

Latency plot of system in rack #d, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -p99 -i200 -h400 -a0-2 -t3 -q done
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Mon Feb 24, 2020 00:49:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
168272265259,3sleep10-21swapper/119:07:301
167552245239,3sleep00-21swapper/019:06:410
170312244237,4sleep20-21swapper/219:09:472
170322234227,4sleep30-21swapper/319:09:483
167282233227,3sleep40-21swapper/419:06:214
170482231224,4sleep50-21swapper/519:09:585
169602231225,3sleep70-21swapper/719:08:557
167522231224,4sleep60-21swapper/619:06:396
2525621220,0sleep70-21swapper/719:45:087
242922730,0sleep20-21swapper/220:30:052
100532680,0sleep00-21swapper/020:45:100
253852640,0sleep31730199cyclictest22:25:193
85002560,0sleep549-21ksoftirqd/520:00:045
17308992213,0cyclictest0-21swapper/422:39:364
17308992213,0cyclictest0-21swapper/422:39:354
1732299215,15cyclictest0-21swapper/723:20:007
1732299215,15cyclictest0-21swapper/721:00:007
17296992020,0cyclictest0-21swapper/220:39:262
160462180,0sleep50-21swapper/519:35:215
1732299170,16cyclictest0-21swapper/719:15:227
1731299171,15cyclictest0-21swapper/519:10:105
17308991715,1cyclictest0-21swapper/419:15:524
17301991715,1cyclictest23025-21/usr/share/muni19:15:093
230512160,0sleep10-21swapper/121:00:011
1732299160,15cyclictest0-21swapper/719:10:037
17317991614,1cyclictest23022-21/usr/share/muni19:15:036
1731799160,15cyclictest17645-21df19:10:026
1730899160,1cyclictest17718-21gltestperf19:10:024
17301991613,2cyclictest17559-21/usr/sbin/munin19:10:033
17296991614,1cyclictest0-21swapper/219:10:012
1729699160,1cyclictest0-21swapper/219:15:082
1729199160,15cyclictest0-21swapper/119:15:111
1729199160,15cyclictest0-21swapper/119:10:021
17289991614,1cyclictest22263-21munin-limits19:11:040
17289991614,1cyclictest16160-21kworker/0:222:50:470
1728999160,0cyclictest111rcu_preempt23:10:030
76062150,0sleep70-21swapper/721:55:187
1731299150,14cyclictest0-21swapper/519:15:065
17308991513,1cyclictest25681-21kworker/4:222:30:014
1730899150,14cyclictest0-21swapper/419:40:264
1730899150,14cyclictest0-21swapper/400:20:184
17289991514,1cyclictest0-21swapper/019:15:110
1728999150,14cyclictest30737-21/usr/share/muni22:05:070
1728999150,0cyclictest12181-21/usr/share/muni20:50:070
17322991411,2cyclictest1023-21snmpd00:00:137
17308991414,0cyclictest0-21swapper/420:13:594
17308991411,2cyclictest1023-21snmpd20:15:054
17296991411,2cyclictest1023-21snmpd19:25:462
17291991412,1cyclictest16521-21snmp_rdswitch.o22:50:011
17289991413,1cyclictest1855-21kworker/0:100:31:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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