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2025-01-14 - 06:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Jan 14, 2025 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2246699700,67cyclictest20050-21missed_timers00:15:213
2847191640,4ptp4l4497-21apt-get19:40:160
2847191640,4ptp4l0-21swapper/100:10:001
45792630,4sleep20-21swapper/222:10:222
2246699630,59cyclictest23695-21grep19:10:233
2246699620,22cyclictest4124-21cat20:50:293
2847191610,3ptp4l0-21swapper/220:15:552
2246699610,20cyclictest18887-21hddtemp_smartct20:10:213
300542600,5sleep10-21swapper/123:17:171
2847191590,4ptp4l0-21swapper/021:35:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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