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2024-04-21 - 07:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot1.osadl.org (updated Sun Apr 21, 2024 00:46:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1176912100,68ptp4l8226-21/usr/sbin/munin19:05:261
2066821820,10sleep3945499cyclictest00:05:303
1176911610,9ptp4l0-21swapper/319:09:503
1176911580,63ptp4l0-21swapper/219:08:032
2145221460,8sleep1945299cyclictest19:35:131
1176911290,7ptp4l0-21swapper/019:07:400
117791820,8getstats945299cyclictest22:15:031
117691780,2ptp4l0-21swapper/021:15:110
117691750,20ptp4l0-21swapper/223:25:282
117691680,1ptp4l0-21swapper/022:50:150
117691660,4ptp4l24572-21cut23:05:210
324662640,5sleep332471-21latency00:30:233
117691640,4ptp4l6640-21users22:25:380
117691640,18ptp4l22574-21/usr/sbin/munin23:00:260
117691640,18ptp4l0-21swapper/023:45:210
117691640,18ptp4l0-21swapper/023:45:210
117691630,2ptp4l0-21swapper/022:05:290
117691630,2ptp4l0-21swapper/021:10:270
85992620,5sleep15367-21apache223:40:191
117691620,4ptp4l26668-21ls22:00:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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