You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-03-18 - 15:09
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot1.osadl.org (updated Tue Mar 18, 2025 00:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2998821720,3sleep00-21swapper/020:25:160
3172521610,6sleep02850599cyclictest21:50:000
52442860,6sleep02850599cyclictest19:30:000
2850899660,62cyclictest17085-21timerwakeupswit19:55:273
22662660,5sleep10-21swapper/123:20:281
2847191640,17ptp4l0-21swapper/020:35:150
2847191610,4ptp4l0-21swapper/023:40:210
2850899601,21cyclictest9381-21df_abs20:50:153
2847191600,3ptp4l0-21swapper/123:56:431
2850899592,19cyclictest0-21swapper/320:55:303
2847191590,5ptp4l14330-21ntp_states19:50:190
2847191590,3ptp4l0-21swapper/021:40:160
2847191580,3ptp4l0-21swapper/220:09:262
2847191580,3ptp4l0-21swapper/120:42:191
2847191580,3ptp4l0-21swapper/100:31:241
2847191580,3ptp4l0-21swapper/020:11:060
2847191570,4ptp4l0-21swapper/221:02:562
2847191570,3ptp4l0-21swapper/223:49:242
2847191570,3ptp4l0-21swapper/123:35:281
2847191570,3ptp4l0-21swapper/123:35:271
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional