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2024-05-22 - 00:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Tue May 21, 2024 12:46:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
428121790,8sleep12362199cyclictest12:10:331
8255911770,6ptp4l401ktimersoftd/307:06:073
23620997411,12cyclictest16116-21tune2fs09:10:150
23620997210,12cyclictest27012-21sed09:35:000
181842710,9sleep22362299cyclictest08:05:192
231832702,56sleep00-21swapper/007:08:070
183822690,2sleep10-21swapper/109:15:151
2362099689,12cyclictest15328-21latency_hist09:10:000
2362099638,12cyclictest471-21cat10:55:130
2362099637,20cyclictest31830-21ls10:50:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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