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2022-01-22 - 15:31

Intel(R) Atom(TM) CPU E3845 @ 1.91GHz, Linux 4.19.37-rt19 (Profile)

Latency plot of system in rack #d, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 --smi -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot3.osadl.org (updated Sat Jan 22, 2022 12:46:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2569821850,9sleep32108399cyclictest11:15:013
194252858,19sleep00-21swapper/007:06:080
128291849,18phc2sys0-21swapper/307:05:443
40382780,2sleep30-21swapper/312:05:283
21082997833,5cyclictest33-21ksoftirqd/212:35:112
21082997431,5cyclictest33-21ksoftirqd/209:50:272
206622724,56sleep20-21swapper/207:08:162
21082996933,9cyclictest33-21ksoftirqd/210:05:202
21083996631,8cyclictest41-21ksoftirqd/309:10:383
21083996629,9cyclictest41-21ksoftirqd/310:10:263
149732660,6sleep32108399cyclictest08:20:163
149732660,6sleep32108399cyclictest08:20:163
54502650,9sleep12108199cyclictest08:50:051
267862650,2sleep20-21swapper/208:35:132
21083996520,11cyclictest41-21ksoftirqd/307:15:283
21082996530,9cyclictest33-21ksoftirqd/207:55:082
21083996425,17cyclictest41-21ksoftirqd/308:45:033
2108299632,11cyclictest33-21ksoftirqd/211:40:202
21082996313,5cyclictest33-21ksoftirqd/210:30:262
2108299624,3cyclictest121rcu_preempt11:15:182
21082996221,9cyclictest33-21ksoftirqd/209:10:312
21083996116,10cyclictest41-21ksoftirqd/309:40:063
21082996027,7cyclictest33-21ksoftirqd/210:40:162
21082996021,5cyclictest33-21ksoftirqd/207:25:002
21082996019,5cyclictest33-21ksoftirqd/211:50:062
21082996019,4cyclictest33-21ksoftirqd/211:45:112
21083995925,10cyclictest41-21ksoftirqd/312:10:263
21083995925,10cyclictest41-21ksoftirqd/312:10:253
21083995916,5cyclictest41-21ksoftirqd/310:20:173
2108299593,9cyclictest33-21ksoftirqd/212:10:242
2108299593,9cyclictest33-21ksoftirqd/212:10:242
21082995919,4cyclictest33-21ksoftirqd/207:50:122
21082995917,9cyclictest33-21ksoftirqd/211:20:372
21082995826,9cyclictest33-21ksoftirqd/207:20:012
21082995822,15cyclictest33-21ksoftirqd/212:05:382
21082995819,5cyclictest33-21ksoftirqd/208:15:272
21082995817,4cyclictest33-21ksoftirqd/208:40:342
21082995815,5cyclictest33-21ksoftirqd/207:45:252
21083995727,4cyclictest41-21ksoftirqd/308:30:233
2108299573,11cyclictest33-21ksoftirqd/210:35:232
2108299572,9cyclictest33-21ksoftirqd/212:15:052
21082995715,5cyclictest33-21ksoftirqd/208:55:162
2108399564,9cyclictest41-21ksoftirqd/309:30:253
21083995631,4cyclictest41-21ksoftirqd/311:05:073
21083995623,8cyclictest41-21ksoftirqd/307:40:013
2108399562,10cyclictest41-21ksoftirqd/311:20:273
21082995628,4cyclictest33-21ksoftirqd/211:05:342
21082995615,4cyclictest33-21ksoftirqd/208:45:382
21083995532,8cyclictest41-21ksoftirqd/308:25:393
21083995525,9cyclictest41-21ksoftirqd/312:20:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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