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2024-05-21 - 18:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot4.osadl.org (updated Tue May 21, 2024 12:46:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1299911800,6ptp4l401ktimersoftd/307:05:513
117742147126,9sleep00-21swapper/007:06:570
56498850,54rtkit-daemon25-21ksoftirqd/107:07:501
120132779,18sleep20-21swapper/207:09:592
129991710,2ptp4l391rcuc/309:54:423
1230799710,32cyclictest14354-21taskset11:45:401
66452660,1sleep10-21swapper/108:05:251
112842630,3sleep21230899cyclictest08:15:222
296132600,2sleep30-21swapper/307:45:243
129991560,1ptp4l391rcuc/308:24:423
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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