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2024-09-11 - 15:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Wed Sep 11, 2024 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11621062960,1sleep20-21swapper/210:15:272
2420791360,12ptp4l175090irq/125-enp1s0-TxRx-008:30:013
2420791330,2ptp4l175090irq/125-enp1s0-TxRx-011:44:013
12874442280,2chrt0-21swapper/312:05:143
2420791260,2ptp4l0-21swapper/307:20:113
2420791250,4ptp4l175090irq/125-enp1s0-TxRx-007:05:293
2420791250,4ptp4l175090irq/125-enp1s0-TxRx-007:05:293
2420791240,4ptp4l175090irq/125-enp1s0-TxRx-012:15:013
2420791240,2ptp4l0-21swapper/310:52:573
2420791240,2ptp4l0-21swapper/310:45:253
2420791230,3ptp4l175090irq/125-enp1s0-TxRx-011:05:173
2420791230,2ptp4l0-21swapper/312:00:103
2420791230,2ptp4l0-21swapper/309:47:363
2420791230,2ptp4l0-21swapper/309:25:223
2420791230,1ptp4l0-21swapper/307:59:563
935892992218,2cyclictest1610-21rs:main1
2420791220,4ptp4l175090irq/125-enp1s0-TxRx-008:32:223
2420791220,4ptp4l175090irq/125-enp1s0-TxRx-007:26:003
2420791220,3ptp4l175090irq/125-enp1s0-TxRx-008:50:153
2420791220,3ptp4l0-21swapper/311:15:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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