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2024-05-21 - 18:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Tue May 21, 2024 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
589203996359,2cyclictest0-21swapper/110:15:171
589203996347,15cyclictest783186-21kworker/1:112:32:501
58920399630,61cyclictest0-21swapper/111:22:501
589203996135,25cyclictest589019-21kworker/1:107:10:151
589203996043,16cyclictest663977-21kworker/1:010:00:151
589203995944,14cyclictest767824-21kworker/1:212:20:331
589203995943,15cyclictest594515-21kworker/1:207:35:001
589203995942,15cyclictest2746251-1kworker/1:0H09:00:161
589203995941,17cyclictest730002-21kworker/1:211:40:141
589203995941,16cyclictest2746251-1kworker/1:0H10:30:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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