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2023-09-26 - 21:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot5.osadl.org (updated Tue Sep 26, 2023 12:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1288899340,33cyclictest4349-21diskmemload10:25:221
12894993128,2cyclictest10488-21sed12:40:023
1289499310,30cyclictest0-21swapper/310:24:203
12888993128,2cyclictest0-21swapper/112:26:571
1288899310,30cyclictest0-21swapper/111:18:451
1288899310,0cyclictest4349-21diskmemload11:30:171
1288899310,0cyclictest0-21swapper/112:18:181
12887993129,1cyclictest6616-21cron10:20:010
12887993127,4cyclictest23020-21kworker/0:111:27:540
1288799310,30cyclictest25327-21kernelversion12:20:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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