You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-07-02 - 18:04
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot5.osadl.org (updated Wed Jul 02, 2025 12:44:20)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1167999340,29cyclictest22765-21apt-get09:50:141
1167999310,0cyclictest17248-21perf08:30:001
1167899310,30cyclictest913-21cron07:55:010
11679993028,1cyclictest3070-21cron12:35:011
11688992928,0cyclictest0-21swapper/307:50:143
11688992927,1cyclictest609-21dbus-daemon09:10:013
11688992927,1cyclictest0-21swapper/312:25:013
1168899290,28cyclictest609-21dbus-daemon07:15:013
1168899290,28cyclictest0-21swapper/312:35:143
1168899290,28cyclictest0-21swapper/308:05:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional