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2024-07-13 - 09:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot5.osadl.org (updated Sat Jul 13, 2024 00:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32762993418,16cyclictest58550irq/126-eno100:19:030
3276299334,29cyclictest58550irq/126-eno121:52:450
305993231,1cyclictest1220-21lspci20:18:303
32767993129,1cyclictest0-21swapper/223:30:502
3276799310,30cyclictest1087-21ssh22:59:072
3276499310,31cyclictest7298-21cron21:25:001
3276499310,30cyclictest25353-21diskmemload23:56:161
3276499310,30cyclictest2411-21systemd-journal22:15:011
3276499310,30cyclictest11903-21sh00:19:501
32762993129,1cyclictest8580-21sendmail-msp22:00:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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