You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-04-14 - 18:51

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #e, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot5s.osadl.org (updated Sun Apr 14, 2024 12:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1345399250,24cyclictest7258-21diskmemload10:34:223
13452992523,1cyclictest0-21swapper/209:33:232
1345299250,24cyclictest7258-21diskmemload09:52:032
1345199250,24cyclictest0-21swapper/110:30:361
1345199250,24cyclictest0-21swapper/110:06:231
13450992522,2cyclictest30404-21idleruntime-cro07:45:000
1345099250,1cyclictest14537-21sh09:51:240
1345399240,1cyclictest14723-21ssh10:26:283
1345299240,23cyclictest7258-21diskmemload12:12:462
1345299240,23cyclictest7258-21diskmemload11:20:382
1345299240,23cyclictest18044-21cron08:25:002
1345299240,1cyclictest7258-21diskmemload10:48:582
13451992423,0cyclictest7258-21diskmemload09:45:341
1345199240,24cyclictest0-21swapper/112:04:071
1345199240,24cyclictest0-21swapper/110:36:081
1345199240,23cyclictest7258-21diskmemload10:52:061
1345199240,0cyclictest7258-21diskmemload10:10:151
1345199240,0cyclictest0-21swapper/109:50:421
1345099240,24cyclictest7258-21diskmemload11:21:470
1345099240,24cyclictest0-21swapper/010:20:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional