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2025-01-16 - 07:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Wed Jan 15, 2025 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
804729993521,3cyclictest980009-21cron09:30:010
10808442350,1chrt1080845-21ssh10:42:120
804729993228,3cyclictest501-21dbus-daemon11:20:010
804734992719,2cyclictest191rcu_preempt09:50:001
80473699263,21cyclictest1110521-21awk11:10:002
804736992522,2cyclictest508-21polkitd09:30:002
804739992421,1cyclictest0-21swapper/312:00:003
80473499235,8cyclictest819143-21grep07:20:011
804729992320,2cyclictest917299-21idleruntime-cro08:40:000
804736992219,2cyclictest1100284-21idleruntime-cro11:00:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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