You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-03-03 - 14:44
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Sun Mar 03, 2024 00:44:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2990518993835,1cyclictest0-21swapper/321:55:263
2990518993531,1cyclictest0-21swapper/323:00:273
2990518993431,1cyclictest0-21swapper/320:15:003
2990518993430,1cyclictest0-21swapper/300:00:363
2990518993330,1cyclictest0-21swapper/322:15:353
2990518993225,5cyclictest3319816-21turbostat23:20:003
2990518993129,0cyclictest0-21swapper/321:10:473
2990518993128,1cyclictest0-21swapper/300:15:403
2990518993128,0cyclictest0-21swapper/322:50:223
2990518992925,1cyclictest0-21swapper/321:36:063
33926822280,1sleep20-21swapper/200:10:332
33926822280,1sleep20-21swapper/200:10:322
2990518992826,0cyclictest0-21swapper/323:30:263
2990518992725,0cyclictest0-21swapper/323:05:333
2990518992724,1cyclictest0-21swapper/321:18:053
2990518992723,1cyclictest0-21swapper/300:10:403
2990518992723,1cyclictest0-21swapper/300:10:403
2990518992523,1cyclictest0-21swapper/323:12:283
2990518992522,1cyclictest0-21swapper/323:50:243
2990518992521,1cyclictest0-21swapper/321:50:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional