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2025-12-09 - 21:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Tue Dec 09, 2025 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2382146992320,1cyclictest0-21swapper/308:25:003
147598210,2rtkit-daemon214-21plymouthd11:32:070
2382146992017,1cyclictest0-21swapper/311:25:013
2382146992016,1cyclictest0-21swapper/309:25:003
2382146991916,1cyclictest0-21swapper/310:50:163
2382146991916,1cyclictest0-21swapper/309:15:013
2382146991912,4cyclictest27536642sleep311:25:143
238214699191,14cyclictest2696870-21turbostat10:50:003
238214699190,13cyclictest2745345-21taskset11:20:003
238214699190,13cyclictest2745345-21taskset11:20:003
2382146991815,1cyclictest0-21swapper/312:30:203
2382146991815,1cyclictest0-21swapper/312:00:123
2382146991815,1cyclictest0-21swapper/307:55:013
238214699181,13cyclictest2640537-21turbostat10:15:003
238214699181,13cyclictest2598208-21taskset09:45:263
238214699181,13cyclictest2576275-21chrt09:35:123
238214699181,13cyclictest2410269-21taskset07:30:143
238214699181,12cyclictest2850396-21taskset12:25:003
238214699181,12cyclictest2713131-21taskset11:00:003
238214699180,13cyclictest2485128-21taskset08:30:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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