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2024-07-27 - 07:57

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8s.osadl.org (updated Sat Jul 27, 2024 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
327075399748741,3cyclictest191rcu_preempt3
327075399746738,7cyclictest3678809-21kworker/3:2+events3
327075399744742,1cyclictest3327654-21kworker/3:1+events3
327075399744736,6cyclictest3678809-21kworker/3:2+events3
327075399741736,4cyclictest3678809-21kworker/3:2+events3
327075399740736,3cyclictest3327654-21kworker/3:1+events3
327075399739733,5cyclictest3377131-21turbostat3
327073799738734,3cyclictest3252362-21kworker/1:0+events1
327073799738734,3cyclictest3252362-21kworker/1:0+events1
327073799737733,3cyclictest3252362-21kworker/1:0+events1
327073799737733,3cyclictest3252362-21kworker/1:0+events1
327075399736732,3cyclictest3573800-21kworker/3:0+events3
327075399736730,5cyclictest3327654-21kworker/3:1+events3
327073799735731,3cyclictest3252362-21kworker/1:0+events1
327075399732728,3cyclictest3327654-21kworker/3:1+events3
327075399730726,3cyclictest3327654-21kworker/3:1+events3
327075399729726,2cyclictest3245886-21kworker/3:2+events3
327073799729725,3cyclictest3252362-21kworker/1:0+events1
327075399728724,3cyclictest3602723-21kworker/3:1+events3
327075399727722,4cyclictest3327654-21kworker/3:1+events3
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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