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2024-12-05 - 14:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackfslot3.osadl.org (updated Wed Oct 23, 2024 00:45:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1236856993831,5cyclictest0-21swapper/220:00:182
1236856993830,5cyclictest0-21swapper/200:30:012
1236856993730,5cyclictest0-21swapper/220:40:012
1236856993527,5cyclictest0-21swapper/222:30:172
1236852993522,11cyclictest0-21swapper/000:30:200
1236856993426,5cyclictest0-21swapper/223:30:322
1236856993426,5cyclictest0-21swapper/223:25:122
1236856993426,5cyclictest0-21swapper/222:20:002
1236854993428,4cyclictest1362833-21ssh00:15:021
1236854993415,6cyclictest1296405-21ssh22:00:171
1236859993325,5cyclictest0-21swapper/322:10:193
1236856993325,5cyclictest0-21swapper/222:55:252
1236856993325,5cyclictest0-21swapper/222:47:582
1236856993325,5cyclictest0-21swapper/222:25:262
1236856993325,5cyclictest0-21swapper/221:50:002
1236856993325,5cyclictest0-21swapper/200:35:252
1236856993325,5cyclictest0-21swapper/200:20:232
1236859993224,5cyclictest0-21swapper/300:15:303
1236859993224,5cyclictest0-21swapper/300:15:293
1236856993224,5cyclictest0-21swapper/223:20:192
1236856993224,5cyclictest0-21swapper/223:15:232
1236856993224,5cyclictest0-21swapper/223:05:252
1236856993224,5cyclictest0-21swapper/222:50:342
1236856993224,5cyclictest0-21swapper/222:35:252
1236856993224,5cyclictest0-21swapper/222:35:252
1236856993224,5cyclictest0-21swapper/221:55:012
1236854993210,7cyclictest0-21swapper/121:57:531
1236859993123,5cyclictest0-21swapper/323:45:013
1236859993123,5cyclictest0-21swapper/323:45:003
1236859993123,5cyclictest0-21swapper/321:55:113
1236859993123,5cyclictest0-21swapper/321:35:003
1236856993124,5cyclictest0-21swapper/219:15:232
1236856993123,5cyclictest0-21swapper/223:55:272
1236856993123,5cyclictest0-21swapper/222:22:002
1236856993123,5cyclictest0-21swapper/222:05:202
1236856993123,5cyclictest0-21swapper/221:55:192
1236856993123,5cyclictest0-21swapper/221:35:292
1236856993123,5cyclictest0-21swapper/221:20:152
1236856993123,5cyclictest0-21swapper/221:15:182
1236856993123,5cyclictest0-21swapper/221:10:282
1236856993123,5cyclictest0-21swapper/219:40:002
1236856993123,5cyclictest0-21swapper/200:15:002
1236856993123,5cyclictest0-21swapper/200:05:192
1236856993123,5cyclictest0-21swapper/200:00:172
1236854993122,3cyclictest1307731-21kworker/u16:1+xprtiod22:39:331
1236854993122,3cyclictest1307731-21kworker/u16:1+xprtiod22:39:331
1236854993116,2cyclictest181rcu_preempt21:33:511
1236852993119,10cyclictest0-21swapper/022:15:300
1236852993119,10cyclictest0-21swapper/021:50:280
1236852993118,9cyclictest1348686-21ntpq23:45:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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