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2025-06-18 - 23:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Wed Jun 18, 2025 12:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3200792995315,38cyclictest0-21swapper/312:05:183
3200792995213,38cyclictest0-21swapper/310:20:183
3200789995013,18cyclictest0-21swapper/008:10:180
3200796994910,39cyclictest0-21swapper/711:30:187
3200790994911,19cyclictest876-21mta-sts-daemon09:30:351
320079499489,39cyclictest0-21swapper/507:30:185
320079399489,39cyclictest0-21swapper/408:05:194
320079099489,19cyclictest0-21swapper/109:45:171
3200790994810,18cyclictest0-21swapper/110:20:181
3200796994727,20cyclictest871ktimers/711:35:187
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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