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2022-12-03 - 19:39

ARM Xilinx Zync @666 MHz, Linux 3.12.24-rt38 (Profile)

Latency plot of system in rack #b, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot8.osadl.org (updated Sat Dec 03, 2022 12:43:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
587502086330irq/54-eth00-21swapper/107:06:391
587502086330irq/54-eth00-21swapper/107:06:391
11783997116cyclictest0-21swapper/009:30:390
1097927135sleep00-21swapper/007:05:410
1097927135sleep00-21swapper/007:05:410
11783997015cyclictest0-21swapper/010:10:090
11783996529cyclictest0-21swapper/009:28:170
1178399649cyclictest0-21swapper/011:23:540
11783996428cyclictest0-21swapper/011:40:200
11783996428cyclictest0-21swapper/007:35:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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