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2024-04-27 - 01:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Sat Apr 27, 2024 00:45:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34139252221161,50sleep140-21swapper/1419:06:316
34143092215198,9sleep60-21swapper/619:09:5012
34142052197179,9sleep50-21swapper/519:08:2911
34140882184178,3sleep30-21swapper/319:07:399
34140632176168,4sleep40-21swapper/419:07:2410
34139462169152,9sleep10-21swapper/119:06:491
19777201610,155pipewire0-21swapper/1319:05:295
34139192141122,9sleep80-21swapper/819:06:2314
34139392139119,10sleep110-21swapper/1119:06:433
34139612138115,2sleep70-21swapper/719:06:5513
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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