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2024-07-27 - 07:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Sat Jul 27, 2024 00:46:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26464709926113,138cyclictest0-21swapper/321:46:599
2646460992265,118cyclictest0-21swapper/021:05:030
26465149922512,118cyclictest0-21swapper/1521:05:037
26464639920815,78cyclictest2931189-21tr20:25:211
26458332206184,13sleep60-21swapper/619:08:2312
26465049919251,137cyclictest0-21swapper/1222:30:184
26465149918313,70cyclictest0-21swapper/1522:21:247
26465149918313,70cyclictest0-21swapper/1522:21:247
26465149918113,69cyclictest0-21swapper/1520:05:237
26465149918013,70cyclictest0-21swapper/1521:26:277
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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