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2025-06-13 - 17:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Fri Jun 13, 2025 12:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1979570991130,112cyclictest2029734-21meminfo08:00:214
19795689910248,28cyclictest3828781-21AppRun09:06:332
197955999970,95cyclictest2238402-21meminfo11:45:211
197955799910,90cyclictest2242878-21meminfo11:50:200
1979569999018,71cyclictest2094480-21meminfo09:10:213
197956399890,88cyclictest2141322-21meminfo10:00:2111
197956699880,87cyclictest2164420-21meminfo10:25:2114
197956299880,87cyclictest1987630-21meminfo07:15:2410
197956999860,85cyclictest2141319-21meminfo10:00:213
1979567998616,42cyclictest0-21swapper/909:06:3215
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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