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2025-01-16 - 05:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Wed Jan 15, 2025 12:46:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
380792999427423,3cyclictest3811467-21kworker/u64:4+events_unbound07:35:052
380793799410409,0cyclictest0-21swapper/1507:35:057
380792099329328,1cyclictest0-21swapper/207:35:058
380791899321319,2cyclictest28550irq/127-xhci_hcd07:35:050
380793699305304,0cyclictest0-21swapper/1407:35:056
380792499286279,6cyclictest3006961-21Renderer07:40:5711
380792499285278,6cyclictest13370-21Renderer07:34:3311
3807932992840,283cyclictest0-21swapper/1207:41:194
380792899284277,6cyclictest13370-21Renderer07:36:3515
380792899284275,8cyclictest13370-21Renderer07:34:3315
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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