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2023-12-07 - 13:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Sun Oct 15, 2023 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
190851999439438,1cyclictest1954340-21kworker/7:208:00:0613
190851999438437,1cyclictest1069583-21kworker/7:007:30:0613
190852799434434,0cyclictest0-21swapper/1308:00:055
1908529994300,1cyclictest0-21swapper/1509:55:227
190850899430426,4cyclictest1931838-21kworker/u32:007:49:550
1908529994290,428cyclictest0-21swapper/1508:09:567
190852999427414,13cyclictest0-21swapper/1508:19:567
190851899427426,1cyclictest2045872-21kworker/u32:009:55:2112
190851399422421,1cyclictest26750irq/127-xhci_hc07:49:568
190852999421409,12cyclictest0-21swapper/1507:49:567
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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