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2023-02-02 - 15:36

x86 Intel Core i9-9900K @3600 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 -q done
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot8.osadl.org (updated Thu Feb 02, 2023 12:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
711631995052,500cyclictest730689-21meminfo07:25:2614
711631995052,500cyclictest730689-21meminfo07:25:2514
711627994010,397cyclictest946139-21meminfo10:10:2311
711631993572,353cyclictest1132847-21meminfo11:45:2114
711635993291,327cyclictest812373-21meminfo08:55:272
711625993183,312cyclictest866641-21meminfo09:30:259
711635993151,313cyclictest739751-21meminfo07:35:242
711624992952,292cyclictest798629-21meminfo08:40:278
711631992790,277cyclictest886010-21meminfo09:40:2414
711626992631,260cyclictest1034590-21meminfo10:55:2210
711624992581,253cyclictest757920-21meminfo07:55:258
711624992570,255cyclictest721150-21meminfo07:15:288
711624992570,255cyclictest721150-21meminfo07:15:278
711638992481,245cyclictest1211994-21meminfo12:25:225
711627992461,244cyclictest1201941-21meminfo12:20:2411
711636992421,238cyclictest1044461-21meminfo11:00:253
711631992330,232cyclictest1123234-21meminfo11:40:2114
711631992330,232cyclictest1123234-21meminfo11:40:2014
711637992323,226cyclictest803076-21meminfo08:45:314
711624992270,225cyclictest1123236-21meminfo11:40:228
711624992270,225cyclictest1123236-21meminfo11:40:218
711636992221,218cyclictest1142520-21meminfo11:50:223
711625992181,216cyclictest744182-21meminfo07:40:269
711625991950,186cyclictest753044-21meminfo07:50:249
711625991840,182cyclictest766995-21meminfo08:05:289
711626991830,182cyclictest826062-21meminfo09:10:2210
711636991821,175cyclictest821432-21meminfo09:05:343
711619991810,180cyclictest762536-21meminfo08:00:250
711625991760,175cyclictest1103463-21meminfo11:30:239
711624991750,172cyclictest1093285-21meminfo11:25:228
711621991731,171cyclictest886009-21meminfo09:40:241
711627991720,172cyclictest816987-21meminfo09:00:2511
711621991690,168cyclictest1054039-21meminfo11:05:201
711627991680,165cyclictest1083324-21meminfo11:20:2511
711624991660,165cyclictest866639-21meminfo09:30:258
711627991642,161cyclictest717914-21meminfo07:15:0111
711627991642,161cyclictest717914-21meminfo07:15:0111
711631991630,161cyclictest1152819-21meminfo11:55:2414
711635991591,157cyclictest725795-21meminfo07:20:272
711635991591,157cyclictest725795-21meminfo07:20:262
711625991541,152cyclictest916634-21meminfo09:55:259
711627991520,151cyclictest785146-21meminfo08:25:2511
711636991440,143cyclictest906731-21meminfo09:50:273
711631991420,140cyclictest771419-21meminfo08:10:2614
711627991421,140cyclictest1063889-21meminfo11:10:2311
711631991390,138cyclictest1192226-21meminfo12:15:2114
711627991390,138cyclictest936560-21meminfo10:05:2511
711627991370,136cyclictest1113144-21meminfo11:35:2211
711619991360,135cyclictest1024546-21meminfo10:50:210
711638991311,129cyclictest1132849-21meminfo11:45:215
711636991301,128cyclictest775851-21meminfo08:15:343
711636991290,127cyclictest725793-21meminfo07:20:263
711636991290,127cyclictest725793-21meminfo07:20:253
711621991210,120cyclictest1024547-21meminfo10:50:211
711631991182,115cyclictest762538-21meminfo08:00:2614
711625991171,114cyclictest771420-21meminfo08:10:279
711636991160,112cyclictest1221922-21meminfo12:30:213
711627991161,113cyclictest735325-21meminfo07:30:2511
711626991120,111cyclictest721151-21meminfo07:15:2810
711626991120,111cyclictest721151-21meminfo07:15:2710
711631991100,108cyclictest807500-21meminfo08:50:2814
711624991101,108cyclictest730687-21meminfo07:25:268
711624991101,108cyclictest730687-21meminfo07:25:268
711637991060,105cyclictest744184-21meminfo07:40:264
711624991060,105cyclictest846813-21meminfo09:20:248
711627991051,103cyclictest1221921-21meminfo12:30:2211
711632991011,98cyclictest1152821-21meminfo11:55:2515
71163599990,98cyclictest775852-21meminfo08:15:342
71162499970,96cyclictest812372-21meminfo08:55:258
71163199960,96cyclictest837254-21meminfo09:15:2614
71162499962,93cyclictest1211992-21meminfo12:25:218
71163799950,93cyclictest794190-21meminfo08:35:274
71163799940,94cyclictest975857-21meminfo10:25:344
71161999920,91cyclictest766996-21meminfo08:05:270
71163299900,89cyclictest794191-21meminfo08:35:2715
71163699814,36cyclictest716921-21Chrome_ChildIOT07:45:203
71162199800,79cyclictest1182200-21meminfo12:10:231
71162699790,78cyclictest1201928-21meminfo12:20:2310
71163699789,31cyclictest199874-21DOM12:57:353
71163699788,29cyclictest199873-21DOM12:57:353
71163699788,29cyclictest199873-21DOM12:57:353
71162699750,74cyclictest1231609-21meminfo12:35:2110
71163699740,73cyclictest1054042-21meminfo11:05:203
71163599725,38cyclictest199723-21DOM12:57:352
71162499720,71cyclictest876247-21meminfo09:35:258
71162499720,71cyclictest876247-21meminfo09:35:248
711636997054,14cyclictest716923-21Compositor09:42:463
71163699698,46cyclictest199875-21DOM12:57:353
71163199681,66cyclictest739752-21meminfo07:35:2614
711638996526,28cyclictest10273-21Softwar~cThread07:14:045
711635996534,25cyclictest2772457-21chrome08:01:442
711627996515,14cyclictest716921-21Chrome_ChildIOT11:43:0311
711627996515,14cyclictest716921-21Chrome_ChildIOT11:43:0211
711625996535,26cyclictest3682976-21Timer12:12:529
71162599651,62cyclictest785145-21meminfo08:25:259
711619996520,12cyclictest141rcu_preempt07:17:480
711619996520,12cyclictest141rcu_preempt07:17:470
71163899649,45cyclictest199875-21DOM12:57:355
71163899649,45cyclictest199875-21DOM12:57:355
71163899646,8cyclictest199875-21DOM12:57:355
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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