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2023-01-30 - 05:05

x86 Intel Core i9-9900K @3600 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 -q done
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot8.osadl.org (updated Mon Jan 30, 2023 00:45:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
354231299424419,5cyclictest3602657-21kworker/0:121:11:100
354233099420414,6cyclictest180514-21Renderer20:19:303
354233099420414,6cyclictest180514-21Renderer20:19:303
354233099410408,2cyclictest0-21swapper/1121:09:573
354233499404403,1cyclictest0-21swapper/1421:17:246
354233499403403,0cyclictest0-21swapper/1421:05:096
354233499402402,0cyclictest0-21swapper/1420:21:106
354233399398397,1cyclictest0-21swapper/1321:14:565
354232099397395,2cyclictest0-21swapper/420:19:5510
354232099397395,2cyclictest0-21swapper/420:19:5510
354233599396395,0cyclictest0-21swapper/1521:05:097
354233499396396,0cyclictest0-21swapper/1421:11:106
354233599395395,0cyclictest0-21swapper/1521:17:247
354233599394394,0cyclictest0-21swapper/1520:21:107
354231799389386,3cyclictest0-21swapper/320:19:319
354231799389386,3cyclictest0-21swapper/320:19:309
354233599387387,0cyclictest0-21swapper/1521:11:107
354231799382380,2cyclictest3648144-21turbostat21:09:569
354231299380374,6cyclictest3643758-21turbostat21:04:560
354232199377377,0cyclictest3652524-21turbostat21:14:5611
354232899372368,2cyclictest5520-21Renderer20:21:3815
3542315993671,363cyclictest4021734-21meminfo00:10:258
354232799362360,2cyclictest0-21swapper/820:24:3814
354231299362359,3cyclictest3607328-21turbostat20:24:560
354232799360360,0cyclictest711irq_work/821:01:1914
354232799360360,0cyclictest0-21swapper/820:26:3514
354233499352351,0cyclictest0-21swapper/1421:04:566
354233599342342,0cyclictest0-21swapper/1521:04:567
354231399338333,3cyclictest3853805-21Isolated12:57:351
354232399337337,0cyclictest3663819-21turbostat21:15:0113
354232799330329,1cyclictest0-21swapper/821:05:0914
354232799329329,0cyclictest0-21swapper/821:17:2414
354232799322321,1cyclictest0-21swapper/821:11:1014
354232999319318,1cyclictest0-21swapper/1020:24:382
3542317992971,292cyclictest4001639-21meminfo00:00:319
354233399286282,4cyclictest4337-21Xorg21:01:215
354232899286282,4cyclictest5520-21Renderer21:07:3215
3542321992860,285cyclictest0-21swapper/520:25:1111
3542317992860,285cyclictest0-21swapper/321:18:099
3542317992860,283cyclictest0-21swapper/320:21:539
354231599286285,1cyclictest26750irq/127-xhci_hc20:24:388
354231599284283,1cyclictest26750irq/127-xhci_hc21:13:548
354233399283277,6cyclictest5520-21Renderer20:25:505
354233399283277,6cyclictest5520-21Renderer20:24:055
354232399283283,0cyclictest3612087-21turbostat20:25:0013
354232399283282,1cyclictest3652524-21turbostat21:10:0213
354231399283280,3cyclictest4337-21Xorg20:19:291
354231399283280,3cyclictest4337-21Xorg20:19:281
354231299282278,3cyclictest3602657-21kworker/0:121:07:110
354232999281280,1cyclictest0-21swapper/1021:11:102
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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