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2025-07-08 - 12:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Tue Jul 08, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
218152499151,12cyclictest0-21swapper/320:15:133
2181524991311,1cyclictest0-21swapper/322:50:143
2181524991310,2cyclictest0-21swapper/319:30:143
218152499130,11cyclictest0-21swapper/323:15:133
218152499130,11cyclictest0-21swapper/322:00:143
218152499130,11cyclictest0-21swapper/320:40:013
218152499130,11cyclictest0-21swapper/319:25:143
218152499120,11cyclictest0-21swapper/323:05:133
218152499120,11cyclictest0-21swapper/321:30:193
218152499120,11cyclictest0-21swapper/320:50:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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