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2024-04-24 - 01:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Tue Apr 23, 2024 12:43:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
331779399120,1cyclictest0-21swapper/308:55:173
331779399120,1cyclictest0-21swapper/308:05:113
331779399120,11cyclictest0-21swapper/309:30:113
3317793991111,0cyclictest0-21swapper/312:40:013
3317793991110,0cyclictest0-21swapper/307:30:133
331779399110,11cyclictest0-21swapper/308:40:003
331779399110,10cyclictest0-21swapper/311:35:103
331779399110,10cyclictest0-21swapper/309:45:203
331779399110,0cyclictest0-21swapper/312:11:573
331779399110,0cyclictest0-21swapper/311:55:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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