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2025-04-18 - 14:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Fri Apr 18, 2025 12:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
85644399130,1cyclictest0-21swapper/311:10:083
85644399120,11cyclictest0-21swapper/311:55:243
85644399120,11cyclictest0-21swapper/311:45:013
85644399120,11cyclictest0-21swapper/308:59:553
85644399120,11cyclictest0-21swapper/307:55:193
85644399120,11cyclictest0-21swapper/307:55:183
85644399120,11cyclictest0-21swapper/307:15:153
856443991111,0cyclictest0-21swapper/312:15:203
856443991110,0cyclictest0-21swapper/309:30:133
85644399110,10cyclictest0-21swapper/307:30:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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