You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-12-11 - 06:32
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Wed Dec 11, 2024 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
114010899130,1cyclictest0-21swapper/320:30:123
114010899130,11cyclictest0-21swapper/322:35:133
114010899130,11cyclictest0-21swapper/320:15:133
114010899130,11cyclictest0-21swapper/300:20:123
1140108991210,2cyclictest0-21swapper/320:40:123
114010899120,11cyclictest0-21swapper/323:30:163
114010899120,11cyclictest0-21swapper/323:20:203
114010899120,11cyclictest0-21swapper/322:20:183
114010899120,11cyclictest0-21swapper/321:00:133
1140108991111,0cyclictest0-21swapper/322:26:363
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional