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2025-07-02 - 18:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Wed Jul 02, 2025 12:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1274554991812,1cyclictest1285033-21chrt07:35:013
127455499150,2cyclictest0-21swapper/308:25:133
127455499140,12cyclictest0-21swapper/309:10:133
127455499130,1cyclictest0-21swapper/307:45:133
127455499130,12cyclictest0-21swapper/308:45:133
127455499130,11cyclictest0-21swapper/311:05:013
127455499129,1cyclictest0-21swapper/310:25:133
127455499120,8cyclictest0-21swapper/308:35:163
127455499120,11cyclictest0-21swapper/311:50:153
127455499120,11cyclictest0-21swapper/310:45:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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