You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-09-19 - 22:46
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot3.osadl.org (updated Thu Sep 19, 2024 12:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
822994991211,1cyclictest0-21swapper/310:50:123
82299499120,9cyclictest0-21swapper/309:25:113
82299499120,1cyclictest0-21swapper/308:25:123
82299499120,11cyclictest0-21swapper/310:45:123
82299499120,11cyclictest0-21swapper/308:45:113
82299499110,11cyclictest0-21swapper/308:15:183
82299499110,11cyclictest0-21swapper/307:15:113
82299499110,0cyclictest0-21swapper/308:55:013
82299499110,0cyclictest0-21swapper/308:20:113
82299499109,0cyclictest0-21swapper/308:40:133
822994991010,0cyclictest0-21swapper/310:25:123
822994991010,0cyclictest0-21swapper/309:45:113
822994991010,0cyclictest0-21swapper/309:15:113
822994991010,0cyclictest0-21swapper/309:05:133
822994991010,0cyclictest0-21swapper/308:40:013
82299499100,10cyclictest0-21swapper/310:20:003
82299499100,10cyclictest0-21swapper/308:10:013
82299499100,0cyclictest0-21swapper/312:00:133
82299499100,0cyclictest0-21swapper/308:55:163
82299499100,0cyclictest0-21swapper/307:35:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional