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2023-06-04 - 23:46

ARM Xilinx Zync Ultrascale @1200 MHz, Linux 4.14.0-xilinx-v2018.3 (Profile)

Latency plot of system in rack #1, slot #5
Note that this system runs a non-RT kernel.
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l10000000 -m -Sp99 -i2000 -h3000 -q
Total number of samples: 10 million
Resolution of latency scale: reduced 
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the highest latencies:


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