You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-01-16 - 05:37
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Wed Jan 15, 2025 12:43:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2435025026,8sleep50-21swapper/507:01:075
259612480,0sleep40-21swapper/412:24:424
2446624824,9sleep60-21swapper/607:02:446
254932470,0sleep60-21swapper/609:49:316
186722460,1sleep449-21ksoftirqd/409:40:404
36372450,0sleep50-21swapper/509:19:195
315722440,1sleep731573-21grepconf.sh11:41:047
263122440,0sleep20-21swapper/212:17:112
70302420,0sleep50-21swapper/509:55:075
2447324230,9sleep40-21swapper/407:02:504
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional