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2023-02-07 - 18:37

x86 Intel Xeon E3-1270 v2 @3500 MHz, Linux 4.19.25-rt16 (Profile)

Latency plot of system in rack #3, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Tue Feb 07, 2023 12:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2267424926,9sleep70-21swapper/707:03:527
2267424926,9sleep70-21swapper/707:03:527
50322440,0sleep00-21swapper/010:08:180
50322440,0sleep00-21swapper/010:08:180
2263224222,16sleep50-21swapper/507:03:185
2263224222,16sleep50-21swapper/507:03:185
127482410,0sleep40-21swapper/411:40:394
127482410,0sleep40-21swapper/411:40:394
316892400,0sleep10-21swapper/109:08:051
316892400,0sleep10-21swapper/109:08:051
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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