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2023-06-01 - 10:20

x86 Intel Xeon E3-1270 v2 @3500 MHz, Linux 4.19.25-rt16 (Profile)

Latency plot of system in rack #3, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Thu Jun 01, 2023 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
56302810,0sleep1575499cyclictest23:20:291
56302810,0sleep1575499cyclictest23:20:291
545225229,8sleep20-21swapper/219:06:062
312125125,9sleep40-21swapper/419:03:124
542024825,8sleep10-21swapper/119:05:411
140322480,0sleep70-21swapper/723:45:587
140322480,0sleep70-21swapper/723:45:587
181442430,0sleep70-21swapper/721:33:127
539524229,9sleep30-21swapper/319:05:193
548424129,8sleep70-21swapper/719:06:357
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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