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2024-04-26 - 22:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Apr 26, 2024 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31312750,1sleep22424599cyclictest10:17:082
68772710,1sleep52426499cyclictest11:16:545
105522570,1sleep410554-21kworker/u16:411:43:524
298082520,0sleep00-21swapper/009:41:100
224562500,0sleep70-21swapper/711:22:007
224562500,0sleep70-21swapper/711:22:007
309422490,0sleep20-21swapper/211:55:272
2399524928,17sleep00-21swapper/007:07:290
234362490,0sleep40-21swapper/411:41:524
134392490,0sleep50-21swapper/511:07:015
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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