You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-14 - 19:57
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Tue Apr 14, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
223292530,0sleep10-21swapper/111:36:241
22292510,0sleep70-21swapper/710:13:337
21902510,0sleep10-21swapper/110:15:271
158312510,0sleep70-21swapper/711:36:067
22712500,0sleep20-21swapper/211:01:492
196762500,1sleep219678-21sshd10:51:402
74362490,1sleep27421-21sshd10:39:552
2567124925,8sleep30-21swapper/307:04:313
325512480,1sleep01-21systemd09:40:020
181692470,1sleep5686-21dbus-daemon09:41:035
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional