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2022-07-01 - 00:14

x86 Intel Xeon E3-1270 v2 @3500 MHz, Linux 4.19.25-rt16 (Profile)

Latency plot of system in rack #3, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Thu Jun 30, 2022 12:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
102662810,4sleep70-21swapper/706:59:507
102662810,4sleep70-21swapper/706:59:507
22502440,0sleep30-21swapper/308:39:563
1171124130,8sleep20-21swapper/207:04:032
1171124130,8sleep20-21swapper/207:04:032
291622400,0sleep50-21swapper/510:59:005
265682400,2sleep31187799cyclictest11:29:333
265682400,2sleep31187799cyclictest11:29:333
72732380,0sleep50-21swapper/507:54:335
1017922810,13sleep50-21swapper/506:59:495
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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