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2024-07-21 - 06:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot0.osadl.org (updated Sun Jul 21, 2024 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
201292730,0sleep60-21swapper/622:32:586
199642730,1sleep31290699cyclictest00:02:173
236592570,0sleep10-21swapper/122:07:141
1243625746,8sleep30-21swapper/319:01:473
74192520,0sleep00-21swapper/022:47:580
117652520,0sleep60-21swapper/621:49:416
40442500,0sleep50-21swapper/522:18:235
1271325028,8sleep10-21swapper/119:05:381
1239825037,9sleep50-21swapper/519:01:175
1251524925,8sleep60-21swapper/619:02:546
121312490,0sleep50-21swapper/523:30:555
222042480,0sleep60-21swapper/622:13:446
191922480,0sleep60-21swapper/623:08:386
1266824836,8sleep70-21swapper/719:05:047
25922470,0sleep50-21swapper/523:16:385
238242470,0sleep70-21swapper/722:23:387
17692470,5sleep341-21ksoftirqd/323:29:573
239392460,0sleep10-21swapper/121:14:131
94882450,1sleep4481ktimersoftd/423:27:184
40402450,0sleep1488-21systemd-journal23:00:401
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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