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2022-07-03 - 01:23

x86 Intel Xeon E3-1270 v2 @3500 MHz, Linux 4.19.25-rt16 (Profile)

Latency plot of system in rack #3, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot0.osadl.org (updated Sat Jul 02, 2022 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89842400,0sleep10-21swapper/112:04:301
89842400,0sleep10-21swapper/112:04:301
229052350,0sleep30-21swapper/311:44:463
229052350,0sleep30-21swapper/311:44:463
245542318,9sleep30-21swapper/307:03:563
245542318,9sleep30-21swapper/307:03:563
243872285,8sleep20-21swapper/207:01:392
243872285,8sleep20-21swapper/207:01:392
242822285,8sleep50-21swapper/507:00:145
242822285,8sleep50-21swapper/507:00:145
242722224,14sleep40-21swapper/407:00:054
242722224,14sleep40-21swapper/407:00:054
245892219,9sleep70-21swapper/707:04:247
245892219,9sleep70-21swapper/707:04:247
244712219,8sleep00-21swapper/007:02:490
244712219,8sleep00-21swapper/007:02:490
239492219,7sleep10-21swapper/106:59:541
239492219,7sleep10-21swapper/106:59:541
243152193,12sleep60-21swapper/607:00:396
243152193,12sleep60-21swapper/607:00:396
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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