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2023-01-29 - 16:12

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #4, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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ARM Broadcom BCM2711 @1500 MHz, Linux 5.15.45-rt46-v7l (Profile)

Latency plot of shadow in rack #4, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot1s.osadl.org (updated Sun Jan 29, 2023 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
919721090,3chrt0-21swapper/011:06:300
919721090,3chrt0-21swapper/011:06:300
140992980,2sleep00-21swapper/011:11:490
140992980,2sleep00-21swapper/011:11:490
103042870,3sleep30-21swapper/309:59:183
103042870,3sleep30-21swapper/309:59:183
19295997568,5cyclictest13-21ksoftirqd/011:49:160
19295997568,5cyclictest13-21ksoftirqd/011:49:160
99862740,3sleep10-21swapper/111:42:001
99862740,3sleep10-21swapper/111:42:001
122322720,10sleep338-21ksoftirqd/308:19:233
122322720,10sleep338-21ksoftirqd/308:19:233
7142680,3chrt0-21swapper/309:14:203
7142680,3chrt0-21swapper/309:14:203
316292670,2sleep131742-21awk07:44:301
180962670,3chrt0-21swapper/009:32:540
180962670,3chrt0-21swapper/009:32:540
189812640,2chrt0-21swapper/309:34:063
189812640,2chrt0-21swapper/309:34:063
123542640,2sleep1231rcuc/108:19:251
123542640,2sleep1231rcuc/108:19:251
73002610,3sleep30-21swapper/309:20:473
73002610,3sleep30-21swapper/309:20:473
285822600,2sleep10-21swapper/110:18:491
285822600,2sleep10-21swapper/110:18:491
17542580,2chrt0-21swapper/012:07:590
17542580,2chrt0-21swapper/012:07:590
134712580,3sleep30-21swapper/309:27:593
134712580,3sleep30-21swapper/309:27:593
174882560,2sleep017498-21ssh11:14:510
174882560,2sleep017498-21ssh11:14:510
131412560,3sleep20-21swapper/209:27:292
131412560,3sleep20-21swapper/209:27:292
1929799557,39cyclictest30554-21ssh12:04:192
1929799557,39cyclictest30554-21ssh12:04:192
1929599557,42cyclictest26208-21ssh12:34:170
1929599557,42cyclictest26208-21ssh12:34:170
58682540,4sleep05865-21ssh10:29:090
58682540,4sleep05865-21ssh10:29:090
1929799545,8cyclictest141rcu_preempt08:34:182
1929799545,5cyclictest141rcu_preempt09:29:222
1929799545,5cyclictest141rcu_preempt09:29:222
1929799532,10cyclictest141rcu_preempt10:34:172
1929799532,10cyclictest141rcu_preempt10:34:172
18242510,14sleep338-21ksoftirqd/311:33:503
18242510,14sleep338-21ksoftirqd/311:33:503
291952500,3sleep00-21swapper/012:02:330
291952500,3sleep00-21swapper/012:02:330
12062500,3chrt0-21swapper/010:58:390
12062500,3chrt0-21swapper/010:58:390
101332500,3chrt0-21swapper/311:42:143
101332500,3chrt0-21swapper/311:42:143
208712490,2sleep10-21swapper/109:34:521
208712490,2sleep10-21swapper/109:34:521
208712490,2sleep10-21swapper/109:34:521
77282480,3chrt0-21swapper/208:09:052
77282480,3chrt0-21swapper/208:09:052
72082480,2sleep27233-21latency_hist12:14:052
72082480,2sleep27233-21latency_hist12:14:052
19295994822,19cyclictest52150irq/51-eth011:34:170
19295994732,11cyclictest52150irq/51-eth009:24:150
19295994732,11cyclictest52150irq/51-eth009:24:150
1929799464,34cyclictest25839-21ssh11:59:192
1929799464,34cyclictest25839-21ssh11:59:192
1929699469,30cyclictest15887-21ssh11:14:151
1929699469,30cyclictest15887-21ssh11:14:151
1929799453,5cyclictest141rcu_preempt11:39:192
1929799453,5cyclictest141rcu_preempt11:39:192
19295994516,22cyclictest10659-21ssh10:34:100
19295994516,22cyclictest10659-21ssh10:34:100
19297994420,11cyclictest31-21ksoftirqd/211:24:202
19297994420,11cyclictest31-21ksoftirqd/211:24:202
326792430,9sleep231-21ksoftirqd/211:31:242
326792430,9sleep231-21ksoftirqd/211:31:242
1929799432,32cyclictest12160-21ssh12:19:172
1929799432,32cyclictest12160-21ssh12:19:172
19296994332,5cyclictest1338-21ssh10:24:161
19296994332,5cyclictest1338-21ssh10:24:161
47972420,3sleep30-21swapper/310:27:433
47972420,3sleep30-21swapper/310:27:433
290352420,3sleep30-21swapper/307:39:213
1929599424,37cyclictest21637-21ssh12:29:210
1929599424,37cyclictest21637-21ssh12:29:210
19295994213,21cyclictest52150irq/51-eth009:54:160
19295994213,21cyclictest52150irq/51-eth009:54:160
60942410,3chrt0-21swapper/308:04:203
60942410,3chrt0-21swapper/308:04:203
1929799415,30cyclictest19219-21sh09:34:172
1929799415,30cyclictest19219-21sh09:34:172
1929799415,30cyclictest19219-21sh09:34:172
19296994131,6cyclictest2314-21ssh11:34:171
19295994125,9cyclictest52150irq/51-eth012:09:180
19295994125,9cyclictest52150irq/51-eth012:09:180
1929799403,30cyclictest32633-21diskmemload09:44:152
1929799403,30cyclictest32633-21diskmemload09:44:152
1929599409,23cyclictest10822-21sh10:34:190
1929599409,23cyclictest10822-21sh10:34:190
1929599402,3cyclictest141rcu_preempt08:29:200
56122390,2sleep10-21swapper/109:54:171
56122390,2sleep10-21swapper/109:54:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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