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2024-04-16 - 15:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Tue Apr 16, 2024 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
82922207191,11sleep10-21swapper/107:07:551
84402187171,12sleep00-21swapper/007:09:470
81502178162,12sleep30-21swapper/307:06:063
83792165148,13sleep20-21swapper/207:09:022
68202480,0sleep30-21swapper/311:27:313
247862440,0sleep10-21swapper/108:45:121
306102430,0sleep10-21swapper/111:02:441
248692430,0sleep10-21swapper/110:59:471
16529290,0sleep30-21swapper/310:54:443
86339981,6cyclictest0-21swapper/211:15:112
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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