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2025-07-12 - 13:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sat Jul 12, 2025 00:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
281012206189,12sleep10-21swapper/119:05:071
301262183166,12sleep00-21swapper/019:07:270
302432178161,12sleep30-21swapper/319:08:583
302422158140,13sleep20-21swapper/219:08:572
172952650,0sleep017271-21ssh00:05:120
83702470,0sleep20-21swapper/221:16:232
83702470,0sleep20-21swapper/221:16:232
66852430,0sleep10-21swapper/122:53:551
44672430,0sleep30-21swapper/323:09:183
315312430,0sleep20-21swapper/200:11:582
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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