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2025-07-17 - 18:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Thu Jul 17, 2025 12:44:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
267732207192,11sleep10-21swapper/107:09:161
246232186170,12sleep00-21swapper/007:05:140
265192180163,12sleep30-21swapper/307:05:573
26677211497,12sleep20-21swapper/207:08:002
200542450,0sleep00-21swapper/011:18:440
142652450,0sleep10-21swapper/110:26:081
126712430,0sleep20-21swapper/211:15:092
270079992,3cyclictest220-21systemd-journal10:50:020
270079971,3cyclictest23006-21perf10:15:010
270079965,1cyclictest28595-21perl08:15:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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