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2024-07-27 - 06:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sat Jul 27, 2024 00:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
202942207192,10sleep10-21swapper/119:09:121
201762185167,13sleep00-21swapper/019:07:380
200602184169,11sleep30-21swapper/319:06:093
201162117101,12sleep20-21swapper/219:06:522
172942430,0sleep20-21swapper/223:50:562
132822420,0sleep00-21swapper/021:55:440
140152400,0sleep00-21swapper/023:17:030
4522390,0sleep30-21swapper/322:21:513
5342100,1sleep1201rcuc/122:21:521
2051699100,2cyclictest0-21swapper/023:00:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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