You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2023-05-28 - 01:44

x86 Intel Core i5-6440EQ @2700 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sat May 27, 2023 12:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
41532203187,11sleep30-21swapper/307:05:053
63432197184,9sleep10-21swapper/107:09:321
60942196176,14sleep00-21swapper/007:06:210
41522192175,13sleep20-21swapper/207:05:042
148952500,0sleep3381rcuc/307:25:183
311042460,0sleep00-21swapper/011:01:460
29622430,0sleep00-21swapper/012:02:150
146182420,0sleep10-21swapper/111:30:251
93962130,0sleep30-21swapper/311:46:413
200632110,0sleep00-21swapper/011:53:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional