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2022-07-02 - 18:54

x86 Intel Core i5-6440EQ @2700 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100, Linux 4.9.20-rt16, x86_64 highest latencies:
System rack5slot2.osadl.org (updated Sat Jul 02, 2022 12:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
176872239223,11sleep10-21swapper/107:06:361
179482215176,15sleep00-21swapper/007:09:570
177092195178,12sleep30-21swapper/307:06:553
178052182165,13sleep20-21swapper/207:08:102
220452610,0sleep10-21swapper/110:15:211
326822490,0sleep10-21swapper/112:25:131
146642480,0sleep00-21swapper/011:32:310
81472470,0sleep10-21swapper/112:09:591
238852460,0sleep00-21swapper/010:36:500
24362450,0sleep20-21swapper/211:25:122
286382110,0sleep30-21swapper/309:18:583
169852100,0sleep30-21swapper/311:13:563
140412100,0sleep00-21swapper/011:52:330
181289992,3cyclictest7410-21perf12:30:000
181289980,4cyclictest23738-21munin-run07:20:000
181389970,6cyclictest0-21swapper/208:30:112
181439960,5cyclictest4628-21ssh10:05:123
181389960,1cyclictest0-21swapper/209:10:122
181289962,4cyclictest0-21swapper/011:05:280
181289960,6cyclictest0-21swapper/010:05:520
181289960,6cyclictest0-21swapper/009:35:520
181289960,6cyclictest0-21swapper/009:00:230
181289960,5cyclictest0-21swapper/010:25:010
181289960,3cyclictest31164-21awk08:40:010
181289960,1cyclictest0-21swapper/011:45:510
181289960,1cyclictest0-21swapper/011:39:190
181289960,1cyclictest0-21swapper/010:16:280
24202250,4sleep224219-21ssh09:56:182
181439955,0cyclictest7959-21kworker/3:012:25:583
181439955,0cyclictest7959-21kworker/3:010:56:273
181439950,5cyclictest0-21swapper/312:18:493
181439950,5cyclictest0-21swapper/311:51:543
181439950,5cyclictest0-21swapper/311:46:583
181439950,5cyclictest0-21swapper/311:38:573
181439950,5cyclictest0-21swapper/310:54:343
181439950,5cyclictest0-21swapper/310:12:323
181439950,5cyclictest0-21swapper/309:48:493
181439950,4cyclictest0-21swapper/312:30:113
181439950,4cyclictest0-21swapper/309:30:123
181439950,4cyclictest0-21swapper/309:25:123
181439950,0cyclictest0-21swapper/310:23:443
181389953,2cyclictest0-21swapper/210:45:232
181389950,5cyclictest0-21swapper/212:33:172
181389950,5cyclictest0-21swapper/212:07:582
181389950,5cyclictest0-21swapper/211:31:352
181389950,5cyclictest0-21swapper/210:28:532
181389950,4cyclictest28125-21apt-get10:40:112
181389950,0cyclictest0-21swapper/211:23:262
181339955,0cyclictest0-21swapper/109:18:401
181339952,2cyclictest0-21swapper/109:10:121
181339951,3cyclictest0-21swapper/110:00:121
181339951,2cyclictest0-21swapper/110:05:121
181339951,2cyclictest0-21swapper/109:00:111
181339951,2cyclictest0-21swapper/107:55:121
181339950,5cyclictest0-21swapper/111:58:081
181339950,5cyclictest0-21swapper/111:51:171
181339950,5cyclictest0-21swapper/109:55:281
181289954,1cyclictest0-21swapper/008:55:110
181289952,3cyclictest13090-21grep10:30:160
181289952,3cyclictest0-21swapper/012:35:150
181289952,3cyclictest0-21swapper/012:10:270
181289952,3cyclictest0-21swapper/012:00:500
181289952,3cyclictest0-21swapper/011:20:400
181289950,5cyclictest16596-21apt-get12:15:110
181289950,5cyclictest0-21swapper/012:31:030
181289950,5cyclictest0-21swapper/012:20:310
181289950,5cyclictest0-21swapper/012:05:070
181289950,5cyclictest0-21swapper/011:55:510
181289950,5cyclictest0-21swapper/011:25:040
181289950,5cyclictest0-21swapper/011:15:480
181289950,5cyclictest0-21swapper/011:10:230
181289950,5cyclictest0-21swapper/011:00:560
181289950,5cyclictest0-21swapper/010:55:080
181289950,5cyclictest0-21swapper/010:50:080
181289950,5cyclictest0-21swapper/010:40:240
181289950,5cyclictest0-21swapper/010:10:160
181289950,5cyclictest0-21swapper/010:00:120
181289950,5cyclictest0-21swapper/009:56:080
181289950,5cyclictest0-21swapper/009:50:080
181289950,5cyclictest0-21swapper/009:45:400
181289950,5cyclictest0-21swapper/009:40:400
181289950,5cyclictest0-21swapper/009:31:040
181289950,5cyclictest0-21swapper/009:25:520
181289950,5cyclictest0-21swapper/009:20:120
181289950,5cyclictest0-21swapper/009:15:240
181289950,5cyclictest0-21swapper/009:10:400
181289950,5cyclictest0-21swapper/008:40:110
181289950,5cyclictest0-21swapper/008:10:150
181289950,5cyclictest0-21swapper/007:50:150
181289950,5cyclictest0-21swapper/007:45:160
181289950,5cyclictest0-21swapper/007:35:200
181289950,1cyclictest0-21swapper/008:50:190
181289950,0cyclictest31606-21ssh10:21:240
181289950,0cyclictest0-21swapper/011:40:190
181289950,0cyclictest0-21swapper/011:40:180
181289950,0cyclictest0-21swapper/010:45:360
28876240,0sleep10-21swapper/110:20:141
181439944,0cyclictest7959-21kworker/3:011:30:023
181439944,0cyclictest7959-21kworker/3:010:34:033
181439944,0cyclictest7959-21kworker/3:010:00:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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