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2025-07-15 - 12:02

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot4s.osadl.org (updated Mon Jul 14, 2025 12:44:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1057722510,1sleep30-21swapper/312:25:203
1490699181179,1cyclictest0-21swapper/207:15:002
1490499175171,2cyclictest0-21swapper/107:10:031
1976221290,1sleep119765-21sed08:40:201
146192118104,10sleep20-21swapper/207:08:412
145112118104,10sleep30-21swapper/307:07:163
148999910899,8cyclictest0-21swapper/007:15:000
14622210794,9sleep00-21swapper/007:08:430
14432210694,9sleep10-21swapper/107:06:151
14904996966,2cyclictest7330-21kworker/u16:0+events_unbound11:35:271
14904995539,11cyclictest7330-21kworker/u16:0+events_unbound08:20:371
14904994835,11cyclictest7330-21kworker/u16:0+events_unbound09:30:191
14906994742,3cyclictest20819-21kworker/u16:2+events_unbound07:20:312
14904994440,3cyclictest7330-21kworker/u16:0+events_unbound10:40:211
14904994333,7cyclictest7330-21kworker/u16:0+events_unbound09:20:211
14904994314,13cyclictest15483-21kworker/u16:1+events_unbound07:47:551
14906994036,3cyclictest15483-21kworker/u16:1+events_unbound07:15:032
14906993934,3cyclictest15483-21kworker/u16:1+events_unbound09:45:262
14904993935,3cyclictest15483-21kworker/u16:1+events_unbound09:10:351
14904993910,10cyclictest7330-21kworker/u16:0+events_unbound08:27:431
1490499390,6cyclictest0-21swapper/108:49:221
14906993834,3cyclictest15483-21kworker/u16:1+events_unbound08:00:012
14904993833,4cyclictest7330-21kworker/u16:0+events_unbound09:55:181
14904993833,4cyclictest15483-21kworker/u16:1+events_unbound12:10:201
1490499374,8cyclictest0-21swapper/108:00:061
1490499374,5cyclictest0-21swapper/107:58:431
1490499371,5cyclictest0-21swapper/110:48:311
1490499370,6cyclictest0-21swapper/112:16:351
14906993632,3cyclictest7330-21kworker/u16:0+events_unbound11:00:262
1490499364,7cyclictest0-21swapper/109:39:511
1490499364,5cyclictest0-21swapper/111:07:271
1490499364,5cyclictest0-21swapper/110:31:311
1490499364,10cyclictest7330-21kworker/u16:0+events_unbound12:33:471
1490499363,5cyclictest0-21swapper/109:44:151
1490499363,5cyclictest0-21swapper/109:04:111
1490499363,5cyclictest0-21swapper/108:50:311
1490499363,5cyclictest0-21swapper/108:17:431
1490499363,5cyclictest0-21swapper/108:11:111
14904993613,7cyclictest15483-21kworker/u16:1+events_unbound09:06:071
14904993610,13cyclictest15483-21kworker/u16:1+events_unbound07:39:231
14906993531,3cyclictest15483-21kworker/u16:1+events_unbound10:20:252
1490499354,3cyclictest0-21swapper/107:24:111
1490499353,5cyclictest0-21swapper/111:57:191
1490499353,5cyclictest0-21swapper/111:52:031
1490499353,5cyclictest0-21swapper/110:55:511
14904993532,2cyclictest7330-21kworker/u16:0+events_unbound11:30:281
14904993531,3cyclictest15483-21kworker/u16:1+events_unbound07:15:051
1490499352,8cyclictest0-21swapper/112:29:071
1490499352,8cyclictest0-21swapper/111:19:031
1490499352,8cyclictest0-21swapper/110:17:391
1490499352,8cyclictest0-21swapper/108:30:591
1490499352,8cyclictest0-21swapper/108:08:271
1490499352,8cyclictest0-21swapper/107:42:031
1490499352,5cyclictest0-21swapper/112:22:391
1490499352,5cyclictest0-21swapper/111:14:431
1490499352,5cyclictest0-21swapper/111:02:231
1490499352,5cyclictest0-21swapper/109:29:341
1490499352,5cyclictest0-21swapper/108:55:031
1490499352,5cyclictest0-21swapper/107:26:421
1490499352,10cyclictest271ktimers/107:33:381
1490499351,6cyclictest0-21swapper/111:20:511
1490499351,6cyclictest0-21swapper/111:20:501
1490499351,6cyclictest0-21swapper/110:08:431
1490499351,6cyclictest0-21swapper/109:47:191
1489999353,7cyclictest0-21swapper/009:41:550
1489999351,6cyclictest24151-21kthreadcore10:10:220
1490499344,5cyclictest0-21swapper/111:46:151
1490499344,5cyclictest0-21swapper/110:25:551
1490499344,5cyclictest0-21swapper/107:51:511
1490499342,7cyclictest0-21swapper/112:07:031
1490499342,5cyclictest0-21swapper/112:00:311
1490499342,5cyclictest0-21swapper/111:27:551
1490499341,8cyclictest0-21swapper/112:35:501
1490499341,8cyclictest0-21swapper/110:23:391
1490499341,8cyclictest0-21swapper/110:00:551
1490499341,8cyclictest0-21swapper/108:36:191
1490499341,5cyclictest0-21swapper/111:40:111
1490499341,5cyclictest0-21swapper/110:35:511
1490499341,5cyclictest0-21swapper/109:51:431
1490499340,6cyclictest0-21swapper/110:50:101
1490499340,6cyclictest0-21swapper/110:12:381
1489999344,6cyclictest13075-21munin-run08:35:000
1489999344,5cyclictest0-21swapper/011:03:420
1489999344,5cyclictest0-21swapper/010:57:430
1489999344,5cyclictest0-21swapper/010:49:530
1489999344,5cyclictest0-21swapper/010:20:560
1489999344,5cyclictest0-21swapper/009:36:090
14899993430,3cyclictest7330-21kworker/u16:0+events_unbound11:30:240
1489999341,8cyclictest30229-21users09:45:280
14906993329,3cyclictest7330-21kworker/u16:0+events_unbound10:50:252
1490499330,5cyclictest0-21swapper/109:16:071
1489999333,6cyclictest30369-21perl08:50:170
1489999333,5cyclictest0-21swapper/012:00:200
1489999333,5cyclictest0-21swapper/011:50:430
1489999333,5cyclictest0-21swapper/010:52:410
1489999333,5cyclictest0-21swapper/009:50:340
14906993228,3cyclictest7330-21kworker/u16:0+events_unbound10:40:262
14906993228,3cyclictest20819-21kworker/u16:2+events_unbound07:45:212
1489999324,5cyclictest0-21swapper/011:45:030
1489999324,5cyclictest0-21swapper/007:25:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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