OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8
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Click here to display the system's profile data or here to proceed to next system.

Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.
Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system

Characteristics of the 50 highest latencies:

System rack5slot4s.osadl.org (updated Fri Apr 26, 2024 12:44:40)
Delayed (victim)					Switcher (culprit)			Timestamp	CPU
PID	Prio	Total latency (µs)	T^(,W^*) latency (µs)	Cmd	PID	Prio	Cmd	Timestamp	CPU
29428	99	222	218,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	07:39:52	0
29434	99	158	153,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	12:10:03	1
13765	2	149	0,0	sleep3	0	-21	swapper/3	09:45:29	3
29434	99	128	125,2	cyclictest	16932	-21	kworker/u16:1+events_unbound	07:55:27	1
29113	2	117	104,9	sleep3	0	-21	swapper/3	07:08:04	3
29003	2	116	103,10	sleep2	0	-21	swapper/2	07:06:39	2
29011	2	115	103,9	sleep0	0	-21	swapper/0	07:06:44	0
29434	99	114	104,6	cyclictest	16932	-21	kworker/u16:1+events_unbound	10:20:31	1
29136	2	110	97,10	sleep1	0	-21	swapper/1	07:08:21	1
29434	99	99	95,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	08:45:14	1
29434	99	99	94,4	cyclictest	16932	-21	kworker/u16:1+events_unbound	11:35:01	1
29434	99	98	92,4	cyclictest	16932	-21	kworker/u16:1+events_unbound	11:40:28	1
29428	99	96	91,4	cyclictest	31374	-21	kworker/u16:0+events_unbound	10:10:26	0
29434	99	95	89,4	cyclictest	31374	-21	kworker/u16:0+events_unbound	07:15:02	1
29434	99	94	89,4	cyclictest	31374	-21	kworker/u16:0+events_unbound	12:25:01	1
29428	99	92	87,4	cyclictest	16932	-21	kworker/u16:1+events_unbound	08:00:06	0
29434	99	90	86,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	10:15:16	1
29428	99	90	87,2	cyclictest	31374	-21	kworker/u16:0+events_unbound	10:00:32	0
29434	99	89	84,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	12:05:12	1
29428	99	88	84,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	10:35:13	0
29442	99	87	83,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	07:35:32	2
29442	99	86	82,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	11:20:15	2
29428	99	85	80,4	cyclictest	31374	-21	kworker/u16:0+events_unbound	12:30:27	0
29428	99	83	79,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	08:45:28	0
29434	99	80	76,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	10:50:33	1
29428	99	80	76,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	09:30:32	0
29428	99	79	74,4	cyclictest	31374	-21	kworker/u16:0+events_unbound	07:15:11	0
29428	99	78	74,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	07:20:25	0
29434	99	77	71,4	cyclictest	31374	-21	kworker/u16:0+events_unbound	07:20:11	1
29428	99	77	73,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	10:55:12	0
29434	99	76	72,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	09:15:14	1
29428	99	76	72,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	07:25:29	0
29428	99	76	71,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	11:05:19	0
29434	99	75	71,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	12:00:31	1
29428	99	75	71,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	11:35:32	0
29428	99	75	68,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	08:35:11	0
29434	99	74	58,9	cyclictest	31374	-21	kworker/u16:0+events_unbound	09:47:48	1
29428	99	74	70,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	09:20:32	0
29428	99	74	70,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	12:15:26	0
29428	99	74	69,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	07:55:21	0
29434	99	73	69,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	09:10:11	1
29434	99	73	67,4	cyclictest	16932	-21	kworker/u16:1+events_unbound	11:25:12	1
29434	99	72	68,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	08:00:15	1
29434	99	72	68,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	09:05:32	1
29434	99	71	67,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	11:05:31	1
29434	99	71	67,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	09:00:12	1
29434	99	71	67,3	cyclictest	16932	-21	kworker/u16:1+events_unbound	11:10:30	1
29428	99	71	67,3	cyclictest	7792	-21	kworker/u16:3+events_unbound	12:35:29	0
29428	99	71	67,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	08:10:11	0
29442	99	70	66,3	cyclictest	31374	-21	kworker/u16:0+events_unbound	10:20:01	2
^Timer ^*Wakeup (latency=timer+wakeup+contextswitch)


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This page was last modified on 2019-05-28 - 00:17