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2021-07-29 - 05:48

Intel(R) Celeron(R) CPU N3350 @ 1.10GHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #6, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by a total of 26386 SMIs that occured during the measurement.
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 --smi -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot4.osadl.org (updated Wed Jul 14, 2021 12:44:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120099336334,1cyclictest28683-21kworker/0:008:51:420
120099331328,2cyclictest21249-21kworker/0:211:21:530
120099328325,2cyclictest19551-21kworker/0:011:15:070
1200993270,326cyclictest0-21swapper/010:47:360
120099326323,2cyclictest0-21swapper/008:11:120
120099325322,2cyclictest32016-21kworker/0:112:04:050
120099323321,1cyclictest9800-21kworker/0:109:15:020
1200993231,320cyclictest0-21swapper/011:01:540
1200993231,320cyclictest0-21swapper/009:06:130
1200993231,320cyclictest0-21swapper/007:16:140
120099321318,2cyclictest14641-21kworker/0:012:35:240
120099321318,2cyclictest11334-21kworker/0:310:54:490
1200993211,1cyclictest0-21swapper/012:13:480
120099320317,2cyclictest23323-21kworker/0:209:51:320
120099320316,3cyclictest28424-21kworker/0:211:55:250
1200993201,317cyclictest0-21swapper/008:32:200
1200993201,2cyclictest0-21swapper/011:40:580
1200993200,318cyclictest0-21swapper/007:50:050
120099319316,2cyclictest6365-21kworker/0:207:34:310
120099319316,2cyclictest30177-21kworker/0:110:20:030
1200993191,317cyclictest0-21swapper/008:23:140
1200993191,316cyclictest0-21swapper/009:20:320
120099318316,1cyclictest11520-21kworker/0:007:42:340
120099318315,2cyclictest23323-21kworker/0:210:07:490
120099318315,2cyclictest19551-21kworker/0:011:11:000
120099318315,2cyclictest0-21swapper/009:46:020
120099318298,2cyclictest28424-21kworker/0:211:52:490
1200993181,315cyclictest0-21swapper/008:09:060
1200993181,2cyclictest0-21swapper/007:29:260
1200993180,316cyclictest0-21swapper/009:59:000
1200993180,316cyclictest0-21swapper/008:56:080
1200993180,2cyclictest0-21swapper/009:31:150
120199317314,2cyclictest14917-21kworker/1:207:50:121
120099317315,1cyclictest23523-21kworker/0:108:25:350
120099317314,2cyclictest8001-21kworker/0:010:42:020
120099317314,2cyclictest11520-21kworker/0:008:00:260
1200993170,315cyclictest0-21swapper/011:31:530
1200993170,315cyclictest0-21swapper/010:32:540
1200993170,315cyclictest0-21swapper/009:25:490
1200993170,315cyclictest0-21swapper/007:55:030
120099316314,1cyclictest24974-21kworker/0:011:39:040
120099316314,1cyclictest14739-21kworker/0:209:40:270
120099316313,2cyclictest9616-21kworker/0:012:21:370
1200993161,2cyclictest0-21swapper/007:39:580
1200993160,315cyclictest0-21swapper/010:56:340
1200993160,1cyclictest0-21swapper/010:11:240
120199315311,3cyclictest8083-21kworker/1:009:15:131
120099315313,1cyclictest616-21kworker/0:107:22:210
120099315313,1cyclictest28683-21kworker/0:008:36:190
120099315313,1cyclictest14739-21kworker/0:209:36:480
120099315312,2cyclictest23323-21kworker/0:210:04:370
120099315312,2cyclictest0-21swapper/012:29:280
1200993151,312cyclictest0-21swapper/012:31:590
1200993151,312cyclictest0-21swapper/011:29:290
1200993150,313cyclictest0-21swapper/008:44:030
1200993150,2cyclictest0-21swapper/009:04:170
120099314311,2cyclictest1190-21kworker/0:210:25:230
1200993141,311cyclictest0-21swapper/008:15:050
120199313310,2cyclictest19989-21kworker/1:108:42:171
120199312310,1cyclictest0-21swapper/107:40:141
120099312309,2cyclictest28424-21kworker/0:212:08:050
120099312309,2cyclictest0-21swapper/009:13:220
1200993121,2cyclictest0-21swapper/007:47:470
1200993120,2cyclictest0-21swapper/012:15:390
120199311308,2cyclictest16481-21kworker/1:209:35:001
120199311307,3cyclictest18050-21kworker/1:212:00:181
120099311309,1cyclictest30177-21kworker/0:110:19:050
120099311309,1cyclictest17193-21kworker/0:311:05:340
120099311308,2cyclictest28683-21kworker/0:008:48:060
1200993111,308cyclictest0-21swapper/010:36:170
120199310308,1cyclictest0-21swapper/109:00:181
1200993101,2cyclictest0-21swapper/007:13:510
1200993100,309cyclictest0-21swapper/011:46:200
120199309306,2cyclictest9577-21kworker/1:112:37:131
120199309306,2cyclictest2868-21kworker/1:210:34:471
120199308305,2cyclictest25138-21kworker/1:010:20:141
120199307304,2cyclictest4602-21kworker/1:108:58:111
120199307304,2cyclictest11126-21kworker/1:111:00:171
120199306303,2cyclictest11126-21kworker/1:111:07:401
120199306303,2cyclictest0-21swapper/111:22:411
1201993061,303cyclictest7031-21ntp_states12:10:171
120199305302,2cyclictest2868-21kworker/1:210:29:321
120199305302,2cyclictest18050-21kworker/1:211:31:481
120199304302,1cyclictest2868-21kworker/1:210:40:081
1201993040,301cyclictest25056-21taskset11:29:541
120199303301,1cyclictest0-21swapper/108:11:221
1201993030,1cyclictest0-21swapper/109:20:201
120199302300,1cyclictest18050-21kworker/1:211:13:001
120199302299,2cyclictest19933-21kworker/1:109:45:171
120199302297,3cyclictest19989-21kworker/1:108:25:231
120199301298,2cyclictest0-21swapper/110:51:171
1201993010,299cyclictest0-21swapper/111:15:091
1201993010,299cyclictest0-21swapper/107:29:401
120199300296,2cyclictest25138-21kworker/1:010:10:201
120199299297,1cyclictest0-21swapper/108:30:311
120199299296,2cyclictest25138-21kworker/1:010:06:091
120199299296,2cyclictest18050-21kworker/1:211:35:101
120199299296,2cyclictest1157-21kworker/1:008:52:181
120199299284,13cyclictest19989-21kworker/1:108:45:151
120199297295,1cyclictest0-21swapper/109:55:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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