You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2023-03-24 - 07:30

x86 Intel Xeon E3-1220L V2 @2300 MHz, Linux 4.4.39-rt50+ (Profile)

Latency plot of system in rack #7, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot0.osadl.org (updated Fri Mar 24, 2023 00:44:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117950600,0irq/26-eth1-rx-0-21swapper/319:09:083
117950600,0irq/26-eth1-rx-0-21swapper/119:07:151
117950460,0irq/26-eth1-rx-0-21swapper/219:05:322
117950450,0irq/26-eth1-rx-0-21swapper/019:05:200
9950270,0irq/24-0000:00:0-21swapper/119:10:011
271180,0ktimersoftd/230249-21bash22:47:342
271170,0ktimersoftd/223036-21bash22:04:442
17339991615,0cyclictest0-21swapper/122:49:031
17339991513,0cyclictest110050irq/25-eth021:49:421
1733999150,0cyclictest8973-21diskmemload00:10:231
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional