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2022-05-25 - 21:54

x86 Intel Xeon E3-1220L V2 @2300 MHz, Linux 4.4.39-rt50+ (Profile)

Latency plot of system in rack #7, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot0.osadl.org (updated Fri May 20, 2022 00:44:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050630,0irq/25-eth00-21swapper/119:06:101
110050630,0irq/25-eth00-21swapper/119:06:101
117950600,0irq/26-eth1-rx-0-21swapper/319:05:553
117950600,0irq/26-eth1-rx-0-21swapper/319:05:543
110050590,0irq/25-eth00-21swapper/219:08:522
110050590,0irq/25-eth00-21swapper/219:08:512
110050450,0irq/25-eth00-21swapper/019:07:460
110050450,0irq/25-eth00-21swapper/019:07:450
2625399221,0cyclictest32170-21sshd00:22:530
2625699180,0cyclictest29319-21sshd21:28:193
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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