You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-13 - 09:15
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot0.osadl.org (updated Wed May 13, 2026 00:43:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650590,0irq/26-eth1-rx-0-21swapper/319:05:423
120650590,0irq/26-eth1-rx-0-21swapper/119:07:271
112750550,0irq/25-eth00-21swapper/219:05:522
2171424421,0sleep00-21swapper/019:05:530
2211299180,0cyclictest0-21swapper/000:15:180
22114991514,0cyclictest0-21swapper/221:53:022
22115991412,0cyclictest0-21swapper/323:00:343
22115991412,0cyclictest0-21swapper/323:00:343
2211599140,0cyclictest0-21swapper/320:20:123
22114991413,0cyclictest0-21swapper/221:16:542
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional