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2024-09-11 - 19:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot0.osadl.org (updated Wed Sep 11, 2024 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050670,0irq/25-eth00-21swapper/307:05:143
110050590,0irq/25-eth00-21swapper/107:06:291
3224924721,0sleep20-21swapper/207:07:052
3220324627,0sleep00-21swapper/007:06:310
32557992218,0cyclictest30306-21bash09:49:261
3255699180,0cyclictest20558-21sshd09:44:350
3255699180,0cyclictest14233-21sshd10:43:450
3255899170,0cyclictest0-21swapper/210:55:302
110050170,0irq/25-eth00-21swapper/009:55:200
32559991612,0cyclictest0-21swapper/310:43:593
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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