You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2022-11-30 - 05:13

x86 Intel Xeon E3-1220L V2 @2300 MHz, Linux 4.4.39-rt50+ (Profile)

Latency plot of system in rack #7, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot0.osadl.org (updated Wed Nov 30, 2022 00:45:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117950590,0irq/26-eth1-rx-0-21swapper/119:05:281
110050580,0irq/25-eth00-21swapper/319:06:393
117950480,0irq/26-eth1-rx-0-21swapper/219:05:202
2928424723,0sleep00-21swapper/019:07:000
110050280,0irq/25-eth00-21swapper/219:10:012
29785992019,0cyclictest10537-21munin-run23:14:591
2978499195,0cyclictest21407-21diskmemload23:52:320
29785991715,0cyclictest31348-21sshd23:51:391
2978499175,0cyclictest30205-21id21:50:180
2978499175,0cyclictest21635-21sshd22:06:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional