You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2022-10-03 - 04:42

x86 Intel Xeon E3-1220L V2 @2300 MHz, Linux 4.4.39-rt50+ (Profile)

Latency plot of system in rack #7, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack7slot0.osadl.org (updated Mon Oct 03, 2022 00:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050660,0irq/25-eth00-21swapper/119:05:501
117950640,0irq/26-eth1-rx-0-21swapper/319:05:493
354524828,0sleep20-21swapper/219:06:242
380324621,0sleep00-21swapper/019:09:340
409599170,0cyclictest0-21swapper/023:54:550
4095991514,0cyclictest0-21swapper/021:58:030
4098991413,0cyclictest0-21swapper/323:29:143
4098991411,0cyclictest0-21swapper/323:45:453
4097991413,0cyclictest110050irq/25-eth022:01:082
4097991413,0cyclictest0-21swapper/221:18:162
4097991413,0cyclictest0-21swapper/200:02:042
4096991413,0cyclictest0-21swapper/122:52:141
4096991413,0cyclictest0-21swapper/100:03:331
409699140,0cyclictest0-21swapper/123:36:561
409699140,0cyclictest0-21swapper/123:05:201
4095991411,0cyclictest15099-21sshd21:11:550
351140,0ktimersoftd/30-21swapper/322:08:453
271140,0ktimersoftd/231572-21sshd22:42:512
110050140,0irq/25-eth00-21swapper/221:50:212
4098991312,0cyclictest0-21swapper/322:35:283
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional