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2021-10-24 - 02:42

Intel(R) Xeon(R) CPU E3-1220L V2 @ 2.30GHz, Linux 4.4.39-rt50+ (Profile)

Latency plot of system in rack #7, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack7slot0.osadl.org (updated Sun Oct 24, 2021 00:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050650,0irq/25-eth00-21swapper/119:05:381
117950600,0irq/26-eth1-rx-0-21swapper/319:09:223
110050550,0irq/25-eth00-21swapper/219:07:112
110050500,0irq/25-eth00-21swapper/019:09:520
304399190,0cyclictest8356-21sshd23:46:252
304499187,0cyclictest12393-21bash22:44:333
304399160,0cyclictest0-21swapper/220:35:232
304499154,0cyclictest110050irq/25-eth023:11:553
3044991511,0cyclictest0-21swapper/323:20:473
304299150,0cyclictest24707-21sshd00:31:591
3041991514,0cyclictest0-21swapper/000:39:590
304199150,0cyclictest0-21swapper/000:10:220
304499148,0cyclictest27120-21bash22:47:363
3044991412,0cyclictest27066-21diskmemload23:18:353
3044991412,0cyclictest0-21swapper/323:07:333
304499140,0cyclictest29062-21sshd00:19:083
304499140,0cyclictest28717-21bash23:36:533
304499140,0cyclictest24634-21tr22:05:143
304499140,0cyclictest20423-21sshd22:53:113
304499140,0cyclictest10450-21sshd23:40:083
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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