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2023-01-29 - 07:42

x86 Intel Xeon E3-1220L V2 @2300 MHz, Linux 4.4.39-rt50+ (Profile)

Latency plot of system in rack #7, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack7slot0.osadl.org (updated Sun Jan 29, 2023 00:45:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050610,0irq/25-eth00-21swapper/319:09:093
110050610,0irq/25-eth00-21swapper/119:08:181
110050510,0irq/25-eth00-21swapper/219:05:252
117950460,0irq/26-eth1-rx-0-21swapper/019:05:290
110050290,0irq/25-eth00-21swapper/119:10:001
9950270,0irq/24-0000:00:0-21swapper/319:10:003
117950200,0irq/26-eth1-rx-0-21swapper/019:10:000
3017599191,0cyclictest23444-21sshd23:39:223
110050160,0irq/25-eth00-21swapper/123:24:181
30174991514,0cyclictest0-21swapper/222:34:052
30174991514,0cyclictest0-21swapper/222:34:042
30173991512,0cyclictest22229-21bash21:10:001
3017299150,0cyclictest0-21swapper/021:14:520
30175991413,0cyclictest0-21swapper/321:43:133
3017599140,0cyclictest0-21swapper/322:05:313
3017599140,0cyclictest0-21swapper/321:59:563
30173991413,0cyclictest0-21swapper/100:15:171
30173991411,0cyclictest0-21swapper/100:37:571
3017399140,0cyclictest0-21swapper/120:40:231
3017299146,0cyclictest0-21swapper/022:15:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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