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2025-06-19 - 02:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot0.osadl.org (updated Wed Jun 18, 2025 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050600,0irq/25-eth00-21swapper/107:05:181
117950590,0irq/26-eth1-rx-0-21swapper/307:05:173
110050540,0irq/25-eth00-21swapper/207:05:232
117950500,0irq/26-eth1-rx-0-21swapper/007:08:310
19257991918,0cyclictest11182-21sshd09:32:280
1925899170,0cyclictest0-21swapper/109:33:331
1925999160,0cyclictest0-21swapper/211:15:422
19259991511,0cyclictest30902-21sshd09:57:462
1925999150,0cyclictest3820-21bash12:35:152
1925999150,0cyclictest3820-21bash12:35:142
19258991512,0cyclictest1655-21sshd12:19:551
19258991511,0cyclictest0-21swapper/111:58:051
19257991512,0cyclictest0-21swapper/012:34:370
19260991413,0cyclictest0-21swapper/311:22:343
19260991411,0cyclictest0-21swapper/311:07:403
19259991411,0cyclictest0-21swapper/209:51:282
1925999140,0cyclictest30677-21bash12:19:362
1925999140,0cyclictest0-21swapper/208:55:152
19258991413,0cyclictest0-21swapper/111:03:291
19258991413,0cyclictest0-21swapper/110:08:171
19258991411,0cyclictest0-21swapper/110:42:201
1925899140,0cyclictest0-21swapper/108:46:591
1925899140,0cyclictest0-21swapper/108:28:031
1925899140,0cyclictest0-21swapper/107:30:191
19257991412,0cyclictest0-21swapper/011:59:250
19257991411,0cyclictest0-21swapper/011:06:130
41130,0ktimersoftd/018945-21sshd11:24:400
19260991312,0cyclictest30029-21sshd10:52:483
19260991312,0cyclictest24847-21sshd12:15:533
19260991312,0cyclictest10354-21sshd12:23:463
19260991312,0cyclictest0-21swapper/309:52:103
19260991310,0cyclictest7629-21sshd09:28:143
19260991310,0cyclictest22783-21bash11:10:223
1925999139,0cyclictest11173-21diskmemload11:46:212
1925999139,0cyclictest0-21swapper/209:33:362
19259991312,0cyclictest318-21sshd10:16:132
19259991312,0cyclictest13705-21sshd11:05:492
19259991312,0cyclictest0-21swapper/209:20:282
19259991311,0cyclictest0-21swapper/212:25:102
19259991310,0cyclictest0-21swapper/210:05:112
1925999130,0cyclictest4209-21bash12:23:112
19258991312,0cyclictest0-21swapper/112:27:071
19258991312,0cyclictest0-21swapper/112:22:421
19258991312,0cyclictest0-21swapper/112:12:211
19258991312,0cyclictest0-21swapper/111:21:421
19258991312,0cyclictest0-21swapper/109:14:301
19258991311,0cyclictest0-21swapper/110:15:371
19258991311,0cyclictest0-21swapper/110:12:011
19258991310,0cyclictest0-21swapper/110:28:451
19258991310,0cyclictest0-21swapper/107:35:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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