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2024-04-18 - 06:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot0.osadl.org (updated Thu Apr 18, 2024 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117950650,0irq/26-eth1-rx-0-21swapper/119:08:081
110050640,0irq/25-eth00-21swapper/319:08:093
110050550,0irq/25-eth00-21swapper/219:06:202
1728124520,0sleep00-21swapper/019:07:050
271200,0ktimersoftd/24092-21sshd22:02:092
41190,0ktimersoftd/04105-21sshd22:02:100
191190,0ktimersoftd/14108-21sshd22:02:101
351180,0ktimersoftd/36893-21sshd21:51:253
271180,0ktimersoftd/22548-21sshd22:13:102
1758199180,0cyclictest0-21swapper/223:53:492
17580991716,0cyclictest0-21swapper/121:52:521
17582991615,0cyclictest0-21swapper/322:30:563
17582991514,0cyclictest4281-21sshd00:36:513
1758199150,0cyclictest0-21swapper/223:40:282
1758099150,0cyclictest0-21swapper/123:40:171
17579991513,0cyclictest32233-21munin-run19:40:000
110050150,0irq/25-eth013649-21sshd23:17:583
17582991413,0cyclictest436-21sshd00:10:233
17582991412,0cyclictest0-21swapper/323:10:043
1758299141,0cyclictest0-21swapper/319:40:123
1758199140,0cyclictest17933-21cp23:33:432
1758199140,0cyclictest0-21swapper/223:26:312
1758199140,0cyclictest0-21swapper/221:49:452
17580991413,0cyclictest0-21swapper/122:20:171
1757999140,0cyclictest27476-21sshd22:34:400
110050140,0irq/25-eth016321-21id21:41:090
17582991312,0cyclictest0-21swapper/321:29:493
17582991311,0cyclictest0-21swapper/300:05:153
17582991310,0cyclictest0-21swapper/321:38:103
1758299130,0cyclictest9263-21sshd21:21:073
17581991312,0cyclictest8944-21id22:32:232
17581991312,0cyclictest30151-21sshd00:22:232
17581991312,0cyclictest22259-21bash21:30:212
17581991312,0cyclictest0-21swapper/223:05:162
17581991312,0cyclictest0-21swapper/222:36:482
17581991312,0cyclictest0-21swapper/222:21:212
17581991312,0cyclictest0-21swapper/221:11:252
17581991311,0cyclictest21086-21sshd23:15:082
17581991311,0cyclictest0-21swapper/222:26:072
17580991312,0cyclictest9521-21diskmemload23:26:031
17580991312,0cyclictest6362-21sh00:15:171
17580991312,0cyclictest0-21swapper/123:38:561
17580991312,0cyclictest0-21swapper/122:36:051
17580991311,0cyclictest0-21swapper/100:03:341
17579991312,0cyclictest0-21swapper/022:48:040
17579991312,0cyclictest0-21swapper/022:38:510
1757999130,0cyclictest0-21swapper/023:40:170
1757999130,0cyclictest0-21swapper/022:25:210
110050130,0irq/25-eth00-21swapper/222:49:492
110050130,0irq/25-eth00-21swapper/121:11:591
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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