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2024-12-12 - 05:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Thu Dec 12, 2024 00:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
103321490,1sleep37946-21stress00:39:433
20077212261,56sleep20-21swapper/219:09:532
20077212261,56sleep20-21swapper/219:09:532
19880211452,23sleep10-21swapper/119:07:271
19880211452,23sleep10-21swapper/119:07:271
19857211354,21sleep30-21swapper/319:07:133
19857211354,21sleep30-21swapper/319:07:133
330921120,1sleep27946-21stress23:29:242
2477021110,1sleep37948-21stress23:01:593
610921010,1sleep06110-21awk22:20:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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