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2024-07-27 - 03:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Sat Jul 27, 2024 00:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4264212057,58sleep20-21swapper/219:08:122
4092212060,55sleep30-21swapper/319:06:003
4283211250,23sleep10-21swapper/119:08:271
4262211050,55sleep00-21swapper/019:08:100
175692730,1sleep017566-21fgrep22:10:300
450299522,36cyclictest23443-21stress22:35:380
450299485,23cyclictest0-21swapper/023:43:330
450299484,27cyclictest23443-21stress23:45:320
450299477,24cyclictest0-21swapper/000:10:250
450299476,28cyclictest0-21swapper/020:55:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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