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2025-07-15 - 04:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Tue Jul 15, 2025 00:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7111212461,58sleep30-21swapper/319:06:553
7029212060,20sleep20-21swapper/219:05:542
2357621070,1sleep026749-21stress23:35:150
718428951,33sleep00-21swapper/019:07:480
550828357,21sleep10-21swapper/119:05:041
194212620,1sleep226749-21stress22:07:032
7457994913,19cyclictest0-21swapper/323:16:393
7457994913,19cyclictest0-21swapper/323:16:393
7456994419,22cyclictest0-21swapper/223:42:462
745699438,32cyclictest0-21swapper/221:45:242
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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