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2024-02-27 - 05:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Tue Feb 27, 2024 00:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
556212762,59sleep30-21swapper/319:08:503
1497521250,0sleep37022-21stress22:17:473
554221210,1sleep07022-21stress23:54:540
32746212057,58sleep10-21swapper/119:06:081
595211651,59sleep20-21swapper/219:09:102
501211656,55sleep00-21swapper/019:08:230
59182700,1sleep17022-21stress22:58:581
836995514,22cyclictest0-21swapper/223:16:162
836995212,15cyclictest0-21swapper/222:12:382
836995015,12cyclictest0-21swapper/223:38:532
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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