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2021-06-20 - 03:57

(undisclosed), Linux 4.9.20-rt16 (Profile)

Latency plot of system in rack #7, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot1.osadl.org (updated Sun Jun 20, 2021 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1658212460,58sleep30-21swapper/319:05:453
1706211553,56sleep20-21swapper/219:06:192
1430421100,1sleep022833-21stress22:04:330
1790210050,45sleep10-21swapper/119:07:201
173328454,24sleep00-21swapper/019:06:340
304102770,2sleep022832-21stress23:55:150
211999625,42cyclictest0-21swapper/023:25:200
211999615,45cyclictest0-21swapper/022:50:360
211999615,45cyclictest0-21swapper/021:45:330
211999605,38cyclictest0-21swapper/021:20:280
211999595,39cyclictest0-21swapper/000:01:410
211999585,35cyclictest0-21swapper/022:55:220
211999585,35cyclictest0-21swapper/022:55:220
211999585,34cyclictest0-21swapper/023:30:150
211999575,36cyclictest0-21swapper/023:40:260
211999566,37cyclictest0-21swapper/000:20:340
211999556,15cyclictest0-21swapper/023:20:170
211999556,15cyclictest0-21swapper/023:20:170
211999545,19cyclictest0-21swapper/020:35:020
211999544,47cyclictest0-21swapper/022:25:170
211999535,33cyclictest0-21swapper/000:35:340
211999515,39cyclictest0-21swapper/020:30:110
211999515,38cyclictest0-21swapper/023:10:170
211999515,38cyclictest0-21swapper/023:10:160
211999515,19cyclictest0-21swapper/019:15:300
211999515,19cyclictest0-21swapper/019:15:300
211999507,40cyclictest0-21swapper/022:45:280
211999506,42cyclictest0-21swapper/023:09:210
211999485,7cyclictest27116-21apt-get20:05:120
211999485,40cyclictest0-21swapper/023:15:380
211999485,40cyclictest0-21swapper/022:38:500
211999485,40cyclictest0-21swapper/022:15:260
211999485,40cyclictest0-21swapper/000:10:190
211999484,41cyclictest0-21swapper/023:00:250
211999484,41cyclictest0-21swapper/023:00:250
211999477,37cyclictest0-21swapper/000:05:120
211999475,40cyclictest0-21swapper/023:50:280
211999475,40cyclictest0-21swapper/023:50:280
211999475,39cyclictest0-21swapper/021:40:280
211999475,20cyclictest0-21swapper/022:10:020
211999465,39cyclictest0-21swapper/023:35:130
211999465,39cyclictest0-21swapper/022:32:570
211999465,38cyclictest0-21swapper/023:45:230
211999465,38cyclictest0-21swapper/022:44:540
211999465,38cyclictest0-21swapper/022:44:540
211999465,27cyclictest0-21swapper/019:56:390
211999465,27cyclictest0-21swapper/019:23:190
211999465,19cyclictest0-21swapper/022:20:250
211999465,19cyclictest0-21swapper/021:31:370
211999465,19cyclictest0-21swapper/019:45:110
211999465,16cyclictest0-21swapper/020:58:200
211999464,40cyclictest0-21swapper/022:10:300
211999455,38cyclictest0-21swapper/021:25:140
211999455,38cyclictest0-21swapper/020:10:240
211999455,37cyclictest0-21swapper/021:40:020
211999455,37cyclictest0-21swapper/000:28:340
211999455,37cyclictest0-21swapper/000:28:340
211999455,21cyclictest0-21swapper/022:05:200
211999455,20cyclictest0-21swapper/021:15:130
211999455,20cyclictest0-21swapper/000:30:240
211999455,20cyclictest0-21swapper/000:30:240
211999455,12cyclictest0-21swapper/021:07:380
211999455,12cyclictest0-21swapper/020:01:380
2120994410,22cyclictest0-21swapper/121:20:151
211999445,36cyclictest0-21swapper/021:13:320
211999445,36cyclictest0-21swapper/000:15:130
212099433,32cyclictest0-21swapper/123:05:141
211999435,29cyclictest0-21swapper/019:29:320
211999435,20cyclictest0-21swapper/020:45:120
211999435,20cyclictest0-21swapper/020:15:170
211999435,20cyclictest0-21swapper/019:30:200
211999435,19cyclictest0-21swapper/020:50:210
211999435,19cyclictest0-21swapper/020:28:190
211999435,15cyclictest0-21swapper/021:03:510
211999435,12cyclictest0-21swapper/019:14:180
211999435,12cyclictest0-21swapper/019:14:180
2120994211,23cyclictest0-21swapper/119:25:191
2120994210,22cyclictest0-21swapper/121:40:331
211999425,19cyclictest0-21swapper/021:50:180
211999425,19cyclictest0-21swapper/019:44:050
211999425,19cyclictest0-21swapper/019:36:290
211999425,18cyclictest0-21swapper/019:50:210
212099417,22cyclictest0-21swapper/123:00:281
212099417,22cyclictest0-21swapper/123:00:281
2120994112,22cyclictest0-21swapper/120:30:181
2120994110,22cyclictest0-21swapper/100:20:121
211999415,34cyclictest0-21swapper/021:55:460
211999415,34cyclictest0-21swapper/020:40:090
211999415,19cyclictest0-21swapper/020:20:190
2120994012,20cyclictest0-21swapper/119:55:151
2120994011,22cyclictest0-21swapper/120:53:481
2120994011,21cyclictest0-21swapper/120:45:221
2120994010,27cyclictest0-21swapper/121:32:181
2120994010,22cyclictest0-21swapper/119:50:201
221682395,14sleep20-21swapper/219:51:442
212199397,29cyclictest0-21swapper/223:05:142
212099399,27cyclictest0-21swapper/100:16:151
212099398,22cyclictest0-21swapper/123:55:211
212099395,25cyclictest0-21swapper/119:10:231
212099395,25cyclictest0-21swapper/119:10:231
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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