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2021-10-27 - 00:29

(undisclosed), Linux 4.9.20-rt16 (Profile)

Latency plot of system in rack #7, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot1.osadl.org (updated Tue Oct 26, 2021 12:45:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1555121270,1sleep111646-21stress11:40:351
2309121230,1sleep211646-21stress11:58:342
1405121210,1sleep011646-21stress11:37:470
21240211955,23sleep30-21swapper/307:08:303
21041211653,58sleep10-21swapper/107:06:071
21035211554,55sleep00-21swapper/007:06:020
21120210351,47sleep20-21swapper/207:07:082
21493995914,41cyclictest0-21swapper/210:10:002
21493995914,41cyclictest0-21swapper/210:10:002
21493995815,39cyclictest0-21swapper/210:48:012
21493995815,39cyclictest0-21swapper/210:48:002
21493995815,20cyclictest0-21swapper/212:38:092
21493995814,21cyclictest0-21swapper/210:20:312
21493995713,21cyclictest0-21swapper/210:35:232
21493995713,21cyclictest0-21swapper/210:35:232
21493995614,21cyclictest0-21swapper/212:18:232
21493995614,21cyclictest0-21swapper/211:37:372
2149399558,27cyclictest0-21swapper/210:50:392
21493995514,20cyclictest0-21swapper/212:34:362
21493995511,41cyclictest0-21swapper/212:26:172
21493995415,15cyclictest0-21swapper/211:15:162
21493995414,20cyclictest0-21swapper/212:04:242
21493995414,20cyclictest0-21swapper/211:27:292
2149399539,25cyclictest0-21swapper/210:34:572
2149399539,25cyclictest0-21swapper/210:34:572
21493995315,35cyclictest0-21swapper/209:54:292
2149399527,21cyclictest0-21swapper/209:37:342
2149399526,21cyclictest0-21swapper/212:13:352
21493995215,18cyclictest0-21swapper/211:47:482
21493995215,16cyclictest0-21swapper/211:50:382
21493995215,16cyclictest0-21swapper/211:50:382
21493995215,16cyclictest0-21swapper/209:10:212
21493995214,35cyclictest0-21swapper/209:55:032
21493995214,34cyclictest0-21swapper/211:01:042
2149399516,24cyclictest0-21swapper/211:40:212
2149399516,19cyclictest0-21swapper/212:20:202
2149399516,19cyclictest0-21swapper/212:20:202
21493995113,15cyclictest0-21swapper/211:00:022
21493995112,18cyclictest0-21swapper/210:25:192
21493995111,36cyclictest0-21swapper/210:10:332
2149399509,38cyclictest0-21swapper/212:05:132
2149399508,19cyclictest0-21swapper/211:30:292
21493995016,31cyclictest0-21swapper/210:44:272
21493995016,31cyclictest0-21swapper/210:44:272
21493995014,33cyclictest0-21swapper/210:15:042
21493995010,15cyclictest0-21swapper/211:20:402
2149399497,19cyclictest0-21swapper/209:40:442
21493994913,16cyclictest0-21swapper/210:00:532
21493994913,16cyclictest0-21swapper/210:00:522
21493994913,15cyclictest0-21swapper/211:05:482
21493994910,15cyclictest0-21swapper/209:30:412
21493994910,15cyclictest0-21swapper/209:30:412
2149399489,20cyclictest0-21swapper/209:15:142
2149399486,17cyclictest0-21swapper/211:13:272
2149399486,17cyclictest0-21swapper/211:13:272
21493994712,15cyclictest0-21swapper/209:25:172
21493994712,15cyclictest0-21swapper/209:25:172
2149399466,20cyclictest0-21swapper/207:15:242
2149399465,24cyclictest0-21swapper/208:48:082
2149399465,24cyclictest0-21swapper/208:35:582
21493994611,32cyclictest0-21swapper/209:20:582
2149399459,18cyclictest0-21swapper/207:20:282
2149399455,22cyclictest0-21swapper/208:00:322
21493994513,15cyclictest0-21swapper/207:35:192
2149399445,23cyclictest0-21swapper/209:08:282
21493994411,14cyclictest0-21swapper/207:30:242
2149399439,17cyclictest0-21swapper/207:40:222
2149399435,22cyclictest0-21swapper/208:23:482
2149399435,22cyclictest0-21swapper/208:10:172
2149399435,21cyclictest0-21swapper/208:25:332
21493994311,29cyclictest0-21swapper/207:10:342
21491994311,30cyclictest0-21swapper/012:23:460
21491994311,30cyclictest0-21swapper/012:23:460
21491994116,23cyclictest0-21swapper/010:11:130
21491994112,26cyclictest0-21swapper/009:31:080
21491994112,26cyclictest0-21swapper/009:31:080
2149399406,13cyclictest0-21swapper/207:25:282
2149399405,16cyclictest0-21swapper/208:05:232
21492994015,14cyclictest0-21swapper/109:55:251
21492994010,20cyclictest0-21swapper/109:15:291
21491994011,26cyclictest0-21swapper/009:15:260
2149399399,11cyclictest0-21swapper/208:33:442
2149399395,32cyclictest0-21swapper/207:55:172
2149399395,15cyclictest0-21swapper/207:50:192
2149399395,15cyclictest0-21swapper/207:45:332
21491993912,24cyclictest0-21swapper/010:39:410
21491993912,24cyclictest0-21swapper/010:39:400
267312384,14sleep00-21swapper/007:19:340
2149399387,13cyclictest0-21swapper/209:45:142
2149399385,17cyclictest0-21swapper/208:51:102
2149399385,16cyclictest0-21swapper/208:16:582
21491993811,24cyclictest0-21swapper/010:53:200
24642375,12sleep30-21swapper/307:35:253
235442375,14sleep00-21swapper/007:13:150
22782375,12sleep10-21swapper/108:47:011
2150199379,25cyclictest0-21swapper/311:15:393
21492993712,22cyclictest0-21swapper/111:06:571
324682365,9sleep00-21swapper/008:42:220
29912365,12sleep10-21swapper/107:35:311
280322360,1sleep011646-21stress12:10:070
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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