You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2022-05-28 - 16:37

x86 Intel (undisclosed) @1600 MHz, Linux 4.9.20-rt16 (Profile)

Latency plot of system in rack #7, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack7slot1.osadl.org (updated Sat May 28, 2022 12:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13195212867,56sleep30-21swapper/307:08:203
12983211452,23sleep20-21swapper/207:05:452
13202211151,55sleep00-21swapper/007:08:240
13243210949,55sleep10-21swapper/107:08:531
1344799398,29cyclictest0-21swapper/109:59:201
13447993912,24cyclictest0-21swapper/109:47:441
13447993912,24cyclictest0-21swapper/109:47:441
13447993911,25cyclictest0-21swapper/111:20:231
258582385,13sleep00-21swapper/007:31:470
13447993816,20cyclictest0-21swapper/109:40:421
13447993816,20cyclictest0-21swapper/109:40:421
13447993815,20cyclictest0-21swapper/112:20:071
13447993811,24cyclictest0-21swapper/110:15:451
13447993811,24cyclictest0-21swapper/110:15:451
13447993810,25cyclictest0-21swapper/110:40:541
1344699388,28cyclictest0-21swapper/010:20:020
1344699388,28cyclictest0-21swapper/010:20:010
13446993810,26cyclictest0-21swapper/010:22:050
115812385,13sleep20-21swapper/208:27:582
8032375,12sleep20-21swapper/207:49:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional