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2023-01-29 - 07:48

x86 Intel (undisclosed) @1600 MHz, Linux 4.9.20-rt16 (Profile)

Latency plot of system in rack #7, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack7slot1.osadl.org (updated Sun Jan 29, 2023 00:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1221621310,1sleep315564-21stress23:08:383
584421220,1sleep315564-21stress21:50:483
584421220,1sleep315564-21stress21:50:483
17433211451,58sleep30-21swapper/319:09:153
17394211352,56sleep20-21swapper/219:08:502
17303210947,57sleep10-21swapper/119:07:481
1738228152,23sleep00-21swapper/019:08:400
17629995614,18cyclictest0-21swapper/322:05:273
17629995413,18cyclictest0-21swapper/323:53:533
17629995314,17cyclictest0-21swapper/322:10:233
17629995311,39cyclictest0-21swapper/321:35:163
17629995310,20cyclictest0-21swapper/321:10:173
17629995310,20cyclictest0-21swapper/321:10:173
17625995319,24cyclictest0-21swapper/021:35:350
1762999529,23cyclictest0-21swapper/322:00:313
1762999529,21cyclictest0-21swapper/322:45:173
17629995216,19cyclictest0-21swapper/300:01:043
17629995216,19cyclictest0-21swapper/300:01:033
17629995216,15cyclictest0-21swapper/300:17:053
17629995215,14cyclictest0-21swapper/323:40:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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