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2024-02-23 - 18:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot1.osadl.org (updated Fri Feb 23, 2024 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12062211252,21sleep10-21swapper/107:08:361
1195629252,35sleep00-21swapper/007:07:460
1179229252,35sleep20-21swapper/207:06:112
1190829150,36sleep30-21swapper/307:07:213
1235899606,43cyclictest0-21swapper/310:03:023
1235899606,43cyclictest0-21swapper/310:03:013
1235899596,42cyclictest0-21swapper/309:55:263
1235899576,40cyclictest0-21swapper/312:30:293
1235899576,35cyclictest0-21swapper/312:20:453
1235899559,21cyclictest0-21swapper/311:11:453
1235899547,44cyclictest0-21swapper/311:46:143
1235899546,45cyclictest0-21swapper/311:15:363
1235899536,44cyclictest0-21swapper/312:35:193
1235899536,44cyclictest0-21swapper/310:20:423
1235899536,21cyclictest0-21swapper/310:10:433
1235899528,41cyclictest0-21swapper/310:40:023
1235899528,22cyclictest0-21swapper/310:07:263
1235899527,22cyclictest0-21swapper/311:35:393
1235899526,43cyclictest0-21swapper/311:40:253
1235899526,22cyclictest0-21swapper/310:15:373
1235899526,21cyclictest0-21swapper/311:20:383
1235899526,21cyclictest0-21swapper/310:40:273
1235899526,21cyclictest0-21swapper/309:35:573
1235899517,21cyclictest0-21swapper/309:10:333
1235899517,21cyclictest0-21swapper/309:10:333
1235899516,42cyclictest0-21swapper/312:15:333
1235899516,42cyclictest0-21swapper/311:30:543
1235899516,42cyclictest0-21swapper/310:35:013
1235899516,42cyclictest0-21swapper/309:20:493
1235899516,42cyclictest0-21swapper/309:20:493
1235899516,22cyclictest0-21swapper/311:05:283
1235899516,22cyclictest0-21swapper/311:05:273
1235899516,21cyclictest0-21swapper/311:25:373
1235899516,21cyclictest0-21swapper/310:55:323
1235899516,21cyclictest0-21swapper/309:15:433
1235899507,21cyclictest0-21swapper/312:10:383
1235899506,41cyclictest0-21swapper/310:47:593
1235899506,22cyclictest0-21swapper/310:50:383
1235899506,19cyclictest0-21swapper/312:25:413
1235899496,20cyclictest0-21swapper/310:25:183
1235899488,20cyclictest0-21swapper/312:00:303
1235899486,39cyclictest0-21swapper/311:50:433
1235899486,21cyclictest0-21swapper/309:25:383
1235899485,23cyclictest0-21swapper/312:05:393
1235899478,36cyclictest0-21swapper/309:52:283
1235899477,20cyclictest0-21swapper/309:48:023
1235899477,20cyclictest0-21swapper/309:48:023
1235899476,37cyclictest0-21swapper/309:40:413
1235899466,21cyclictest0-21swapper/311:55:243
1235899465,25cyclictest0-21swapper/308:54:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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