You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-06-19 - 16:16
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot1.osadl.org (updated Wed Jun 19, 2024 12:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3445212052,23sleep00-21swapper/007:05:020
5508211451,23sleep10-21swapper/107:09:471
5343210755,48sleep20-21swapper/207:07:412
545329567,23sleep30-21swapper/307:09:053
139022850,3sleep324233-21stress12:35:443
139022850,3sleep324233-21stress12:35:443
562699707,51cyclictest0-21swapper/009:59:540
562699698,43cyclictest0-21swapper/010:35:330
562699686,50cyclictest0-21swapper/010:30:210
562699676,49cyclictest0-21swapper/009:35:360
562699676,45cyclictest0-21swapper/010:20:300
562699666,44cyclictest0-21swapper/012:10:350
5626996610,45cyclictest0-21swapper/009:25:160
562699659,45cyclictest0-21swapper/010:25:330
562699656,43cyclictest0-21swapper/012:25:440
562699656,43cyclictest0-21swapper/009:15:450
5626996511,36cyclictest0-21swapper/012:00:170
5626996510,43cyclictest0-21swapper/011:55:340
5626996510,43cyclictest0-21swapper/011:55:330
562699647,40cyclictest0-21swapper/011:03:040
562699646,46cyclictest0-21swapper/011:10:240
562699646,46cyclictest0-21swapper/010:45:370
562699646,46cyclictest0-21swapper/010:45:370
562699646,41cyclictest0-21swapper/012:35:220
562699646,41cyclictest0-21swapper/012:35:220
562699646,41cyclictest0-21swapper/012:20:450
5626996411,42cyclictest0-21swapper/011:25:330
5626996411,42cyclictest0-21swapper/011:25:330
562699637,40cyclictest0-21swapper/009:30:480
562699636,41cyclictest0-21swapper/010:40:180
562699629,38cyclictest0-21swapper/009:45:340
562699629,38cyclictest0-21swapper/009:45:020
562699626,45cyclictest0-21swapper/011:45:410
562699626,41cyclictest0-21swapper/011:40:390
562699616,44cyclictest0-21swapper/012:15:430
562699616,44cyclictest0-21swapper/011:15:490
562699616,44cyclictest0-21swapper/011:15:490
562699616,43cyclictest0-21swapper/010:55:460
562699616,43cyclictest0-21swapper/009:20:240
5626996111,32cyclictest0-21swapper/010:14:180
5626996111,32cyclictest0-21swapper/010:14:180
5626996110,19cyclictest0-21swapper/007:16:420
562699606,43cyclictest0-21swapper/011:35:180
562699606,43cyclictest0-21swapper/011:35:170
562699606,39cyclictest0-21swapper/012:05:350
562699606,39cyclictest0-21swapper/012:05:340
5626996010,35cyclictest0-21swapper/009:10:240
562699596,42cyclictest0-21swapper/010:53:510
562699596,38cyclictest0-21swapper/010:00:400
562699536,44cyclictest0-21swapper/010:05:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional