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2024-07-27 - 07:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot1.osadl.org (updated Sat Jul 27, 2024 00:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4264212057,58sleep20-21swapper/219:08:122
4092212060,55sleep30-21swapper/319:06:003
4283211250,23sleep10-21swapper/119:08:271
4262211050,55sleep00-21swapper/019:08:100
175692730,1sleep017566-21fgrep22:10:300
450299522,36cyclictest23443-21stress22:35:380
450299485,23cyclictest0-21swapper/023:43:330
450299484,27cyclictest23443-21stress23:45:320
450299477,24cyclictest0-21swapper/000:10:250
450299476,28cyclictest0-21swapper/020:55:260
450299474,26cyclictest23443-21stress21:55:330
450299473,32cyclictest23445-21stress00:15:220
450299473,29cyclictest23443-21stress23:20:210
450499468,23cyclictest0-21swapper/223:10:332
450299465,28cyclictest0-21swapper/022:30:290
450299464,27cyclictest23443-21stress00:00:220
4504994512,24cyclictest0-21swapper/223:45:352
450299456,24cyclictest0-21swapper/000:05:230
450299456,23cyclictest0-21swapper/000:00:010
450299455,26cyclictest0-21swapper/020:35:090
450299455,24cyclictest23443-21stress23:19:430
450299455,24cyclictest23443-21stress23:19:420
4502994521,21cyclictest0-21swapper/000:35:250
450299446,23cyclictest0-21swapper/021:35:360
450299445,25cyclictest0-21swapper/020:40:150
450299444,24cyclictest23443-21stress21:17:490
4502994421,20cyclictest0-21swapper/023:05:170
4502994421,20cyclictest0-21swapper/022:20:370
4502994420,21cyclictest0-21swapper/022:50:560
450499439,25cyclictest0-21swapper/223:55:152
4504994321,20cyclictest0-21swapper/223:23:312
450299433,24cyclictest4036-21processes22:55:360
4502994321,20cyclictest0-21swapper/000:29:570
4502994321,20cyclictest0-21swapper/000:29:560
4502994320,20cyclictest0-21swapper/023:50:190
91332429,13sleep30-21swapper/319:16:313
450499427,16cyclictest0-21swapper/221:55:392
450299425,24cyclictest0-21swapper/019:40:270
450299424,22cyclictest24190-21cron19:55:000
450299423,28cyclictest6827-21latency_hist19:15:000
4502994221,18cyclictest0-21swapper/021:45:280
4502994220,19cyclictest0-21swapper/021:40:310
4502994219,19cyclictest0-21swapper/021:33:350
4502994218,18cyclictest0-21swapper/019:45:250
4504994112,26cyclictest0-21swapper/222:45:372
4504994111,27cyclictest0-21swapper/221:27:582
450299416,22cyclictest0-21swapper/022:40:360
450299416,19cyclictest0-21swapper/000:20:330
450299416,19cyclictest0-21swapper/000:20:330
450299414,4cyclictest23443-21stress23:35:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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