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2025-06-17 - 06:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackaslot8.osadl.org (updated Tue Jun 17, 2025 00:44:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
133522279222,17sleep30-21swapper/319:06:173
135732268233,23sleep10-21swapper/119:08:531
133592265232,21sleep00-21swapper/019:06:210
134042262229,21sleep20-21swapper/219:06:532
157052650,0sleep20-21swapper/221:40:492
277602590,0sleep30-21swapper/321:26:083
277602590,0sleep30-21swapper/321:26:083
25442590,0sleep00-21swapper/022:20:190
38642570,0sleep30-21swapper/300:25:203
3702570,0sleep20-21swapper/221:30:152
301322560,0sleep00-21swapper/022:16:420
274922540,0sleep30-21swapper/322:15:143
184932540,0sleep20-21swapper/220:30:132
1376299160,2cyclictest323-21ssh00:22:271
278482150,0sleep20-21swapper/200:18:302
1376299151,9cyclictest27787-21awk20:50:161
1376299151,8cyclictest508-21dbus-daemon23:48:281
1376299150,1cyclictest19982-21systemd-journal23:02:191
162002140,1sleep00-21swapper/000:36:530
1376299140,3cyclictest30418-21grep23:30:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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