You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-12-01 - 21:40

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #a, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackaslot8s.osadl.org (updated Sun Dec 01, 2024 13:29:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,7244
"cycles":100000000,7243
"load":"idle",7242
"condition":{7241
"clock":"1600"7239
"family":"x86",7238
"vendor":"Intel",7237
"processor":{7235
"dataset":"2024-01-08T16:20:24+01:00"7233
"origin":"2024-01-08T12:43:22+01:00",7232
"timestamps":{7231
"granularity":"microseconds"7229
3616:11:197227
35,16:10:437226
38,16:10:437225
36,16:10:437224
"maxima":[7223
016:10:437220
0,16:10:437219
0,16:10:437218
0,16:10:437217
0,16:10:437216
0,16:10:437215
0,16:10:437214
0,16:10:437213
0,16:10:437212
0,16:10:437211
0,16:10:437210
0,16:10:437209
0,16:10:437208
0,16:10:437207
0,16:10:437206
0,16:10:437205
0,16:10:437204
0,16:10:437203
0,16:10:437202
0,16:10:437201
0,16:10:437200
0,16:10:437199
0,16:10:437198
0,16:10:437197
0,16:10:437196
0,16:10:437195
0,16:10:437194
0,16:10:437193
0,16:10:437192
0,16:10:437191
0,16:10:437190
0,16:10:437189
0,16:10:437188
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional