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2024-12-11 - 13:56

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #2

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot2s.osadl.org (updated Sun Aug 07, 2022 12:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
280635925647,6sleep30-21swapper/307:07:063
280608324031,6sleep10-21swapper/107:04:151
280618023828,6sleep00-21swapper/007:05:180
280611623627,6sleep20-21swapper/207:04:402
280663899240,23cyclictest0-21swapper/312:15:323
280663899210,12cyclictest0-21swapper/311:40:283
280663899205,14cyclictest0-21swapper/309:17:443
280663899200,5cyclictest0-21swapper/311:12:133
280663899200,5cyclictest0-21swapper/307:54:513
280663899200,19cyclictest0-21swapper/310:11:243
280663899200,11cyclictest0-21swapper/308:36:403
280663899200,11cyclictest0-21swapper/307:08:503
280663899200,10cyclictest0-21swapper/310:06:183
280663899200,10cyclictest0-21swapper/308:41:193
280663899194,14cyclictest0-21swapper/311:51:583
280663899194,14cyclictest0-21swapper/309:00:403
280663899190,9cyclictest0-21swapper/307:33:543
280663899190,18cyclictest0-21swapper/311:58:533
280663899183,14cyclictest0-21swapper/308:31:493
280663899180,8cyclictest0-21swapper/309:11:023
280663899180,18cyclictest0-21swapper/310:51:513
280663899180,10cyclictest0-21swapper/309:32:353
280663899173,13cyclictest0-21swapper/312:31:233
280663899173,13cyclictest0-21swapper/310:37:213
280663899170,9cyclictest0-21swapper/308:56:253
280663899170,8cyclictest0-21swapper/311:52:373
280663899170,16cyclictest0-21swapper/309:47:403
280663899162,13cyclictest0-21swapper/309:52:293
280663899160,6cyclictest0-21swapper/309:29:473
280663899160,6cyclictest0-21swapper/309:14:293
280663899160,15cyclictest0-21swapper/312:24:143
280663899160,15cyclictest0-21swapper/310:54:483
280663899160,15cyclictest0-21swapper/310:44:273
280663899160,15cyclictest0-21swapper/310:19:363
280663899160,15cyclictest0-21swapper/310:13:363
280663899160,15cyclictest0-21swapper/308:12:273
280663899160,15cyclictest0-21swapper/307:20:143
280663899160,1cyclictest0-21swapper/307:12:363
280663899157,8cyclictest0-21swapper/312:12:023
280663899150,6cyclictest0-21swapper/310:28:333
280663899150,6cyclictest0-21swapper/309:38:143
280663899150,6cyclictest0-21swapper/308:19:043
280663899150,14cyclictest0-21swapper/312:20:383
280663899150,14cyclictest0-21swapper/312:20:383
280663899150,14cyclictest0-21swapper/311:31:073
280663899150,14cyclictest0-21swapper/311:25:103
280663899150,14cyclictest0-21swapper/311:19:463
280663899150,14cyclictest0-21swapper/311:16:403
280663899150,14cyclictest0-21swapper/311:04:303
280663899150,14cyclictest0-21swapper/309:44:263
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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