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2024-04-20 - 00:06

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Phytec
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot5s.osadl.org (updated Fri Apr 19, 2024 12:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3857117998074,4cyclictest3921969-21kworker/u8:0+events_unbound12:20:173
3857117996658,6cyclictest3895873-21kworker/u8:4+events_unbound09:14:423
3857117996556,5cyclictest3895873-21kworker/u8:4+events_unbound09:39:473
3857117996556,5cyclictest3895873-21kworker/u8:4+events_unbound09:39:473
3857107996245,13cyclictest121ktimers/010:55:100
3857107996245,13cyclictest121ktimers/010:55:100
3857117996051,7cyclictest3921969-21kworker/u8:0+events_unbound11:55:123
3857117995951,5cyclictest3962009-21kworker/u8:2+events_unbound12:35:203
3857117995951,5cyclictest3962009-21kworker/u8:2+events_unbound12:35:193
3857117995751,4cyclictest3905607-21kworker/u8:2+events_unbound09:44:493
3857117995749,5cyclictest3921969-21kworker/u8:0+events_unbound10:25:193
3857117995649,5cyclictest3949872-21kworker/u8:1+events_unbound11:40:103
3857117995649,5cyclictest3949872-21kworker/u8:1+events_unbound11:40:103
3857116995648,5cyclictest3858583-21kworker/u8:3+events_unbound08:00:142
3857117995547,5cyclictest3868695-21kworker/u8:0+events_unbound08:05:233
3857117995547,5cyclictest3868695-21kworker/u8:0+events_unbound08:05:233
3857117995245,5cyclictest3947994-21kworker/u8:2+events_unbound11:35:083
3857117995043,5cyclictest3131087-21kworker/u8:1+events_unbound07:34:543
3857117995041,5cyclictest3921969-21kworker/u8:0+events_unbound12:20:003
3857116995044,4cyclictest3921969-21kworker/u8:0+events_unbound11:00:042
3857112994937,5cyclictest3910646-21kworker/u8:1+events_unbound10:55:201
3857112994937,5cyclictest3910646-21kworker/u8:1+events_unbound10:55:191
3857117994841,4cyclictest3929245-21sendmail10:40:003
3857117994840,5cyclictest3895873-21kworker/u8:4+events_unbound09:04:193
3857116994840,4cyclictest3902474-21grep09:20:002
3857112994839,6cyclictest213-21dbus-daemon12:35:191
3857112994839,6cyclictest213-21dbus-daemon12:35:181
3857112994835,9cyclictest231ktimers/111:40:121
3857112994835,9cyclictest231ktimers/111:40:111
3857116994738,7cyclictest3858583-21kworker/u8:3+events_unbound08:13:192
3857112994735,9cyclictest3929229-21sendmail10:39:591
3857107994719,11cyclictest3904354-21sed09:25:020
3857107994719,11cyclictest3904354-21sed09:25:010
3857117994539,4cyclictest3960211-21kworker/u8:3+events_unbound12:30:523
3857117994537,5cyclictest3917959-21kworker/u8:3+events_unbound10:05:203
3857112994537,6cyclictest143-21jbd2/mmcblk1p2-808:40:211
3857107994525,12cyclictest0-21swapper/010:20:080
3857107994525,12cyclictest0-21swapper/010:20:070
3857117994437,5cyclictest3952070-21kworker/u8:3+events_unbound11:50:123
3857107994423,12cyclictest0-21swapper/008:55:120
3857116994335,6cyclictest3954021-21kworker/u8:2+events_unbound12:05:152
3857112994336,5cyclictest3868695-21kworker/u8:0+events_unbound08:05:241
3857112994336,5cyclictest3868695-21kworker/u8:0+events_unbound08:05:241
3857107994336,5cyclictest143-21jbd2/mmcblk1p2-807:10:190
3857107994333,7cyclictest3878366-21idleruntime-cro08:10:010
3857107994333,7cyclictest3878366-21idleruntime-cro08:10:000
3857117994236,4cyclictest3894077-21kworker/u8:1+events_unbound09:19:443
3857116994236,4cyclictest3910646-21kworker/u8:1+events_unbound10:00:182
3857116994236,4cyclictest3910646-21kworker/u8:1+events_unbound10:00:182
3857112994234,4cyclictest0-21swapper/111:35:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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